Patents by Inventor Pouya TALEBBEYDOKHTI

Pouya TALEBBEYDOKHTI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230317705
    Abstract: An electronic system has a printed circuit board and a substrate. The substrate has two sides, a top and bottom. At least one memory unit is connected to the bottom side of the substrate and at least one processor is connected to the top side of the substrate. The memory is connected to the processor with interconnects that pass through the substrate.
    Type: Application
    Filed: March 29, 2022
    Publication date: October 5, 2023
    Inventors: Carlton Hanna, Bernd Waidhas, Georg Seidemann, Stephan Stoeckl, Pouya Talebbeydokhti, Stefan Reif, Eduardo De Mesa, Abdallah Bacha, Mohan Prashanth Javare Gowda, Lizabeth Keser
  • Publication number: 20230307313
    Abstract: A semiconductor package comprises a package substrate comprised of at least a first layer of dielectric material including a portion of diamond dust material. The diamond dust material is comprised of diamond dust particles. The semiconductor package includes at least one electrical connection coupled through layers of the package substrate.
    Type: Application
    Filed: March 24, 2022
    Publication date: September 28, 2023
    Inventors: Carlton Hanna, Wolfgang Molzer, Stefan Reif, Georg Seidemann, Stephan Stoeckl, Pouya Talebbeydokhti
  • Publication number: 20230298953
    Abstract: Disclosed herein are microelectronic assemblies, as well as related apparatuses and methods. In some embodiments, a microelectronic assembly may include a substrate; a lid surrounding an individual die, wherein the lid includes a planar portion and two or more sides extending from the planar portion, and wherein the individual die is electrically coupled to the substrate by interconnects; and a material surrounding the interconnects and coupling the two or more sides of the lid to the substrate.
    Type: Application
    Filed: March 20, 2022
    Publication date: September 21, 2023
    Applicant: Intel Corporation
    Inventors: Pouya Talebbeydokhti, Mohan Prashanth Javare Gowda, Sonja Koller, Stephan Stoeckl, Thomas Wagner, Wolfgang Molzer
  • Publication number: 20230268286
    Abstract: Embodiments of a microelectronic assembly comprise a package substrate, including: a first layer comprising a first plurality of mutually parallel channels of a first material; a second layer comprising columns of the first material; and a third layer comprising a second plurality of mutually parallel channels of the first material. The second layer is between the first layer and the third layer, at least some columns extend between and contact the first plurality of mutually parallel channels and the second plurality of mutually parallel channels, and at least a portion of the first layer, the second layer, and the third layer comprises a second material different from the first material.
    Type: Application
    Filed: February 24, 2022
    Publication date: August 24, 2023
    Applicant: Intel Corporation
    Inventors: Mohan Prashanth Javare Gowda, Stephan Stoeckl, Thomas Wagner, Sonja Koller, Wolfgang Molzer, Pouya Talebbeydokhti
  • Publication number: 20230268291
    Abstract: Embodiments of a microelectronic assembly include a package substrate comprising: a first layer comprising a first plurality of mutually parallel channels of a first material; a second layer comprising columns of the first material; and a third layer comprising a second plurality of mutually parallel channels of the first material, the second plurality of mutually parallel channels being orthogonal to the first plurality of mutually parallel channels. The second layer is between the first layer and the third layer, at least some columns extend between and contact the first plurality of mutually parallel channels and the second plurality of mutually parallel channels, and at least a portion of the first layer, the second layer and the third layer comprises a second material different from the first material.
    Type: Application
    Filed: February 24, 2022
    Publication date: August 24, 2023
    Applicant: Intel Corporation
    Inventors: Mohan Prashanth Javare Gowda, Stephan Stoeckl, Sonja Koller, Wolfgang Molzer, Thomas Wagner, Pouya Talebbeydokhti
  • Patent number: 11233018
    Abstract: Wireless modules having a semiconductor package attached to an antenna package is disclosed. The semiconductor package may house one or more electronic components as a single die package and/or a system in a package (SiP) implementation. The antenna package may be communicatively coupled to the semiconductor package using by one or more coupling pads. The antenna package may further have one or more radiating elements for transmitting and or receiving wireless signals. The antenna package and the semiconductor package may have dissimilar number of interconnect layers and/or dissimilar materials of construct.
    Type: Grant
    Filed: February 12, 2020
    Date of Patent: January 25, 2022
    Assignee: INTEL CORPORATION
    Inventors: Sidharth Dalmia, Ana M. Yepes, Pouya Talebbeydokhti, Miroslav Baryakh, Omer Asaf
  • Publication number: 20200185342
    Abstract: Wireless modules having a semiconductor package attached to an antenna package is disclosed. The semiconductor package may house one or more electronic components as a single die package and/or a system in a package (SiP) implementation. The antenna package may be communicatively coupled to the semiconductor package using by one or more coupling pads. The antenna package may further have one or more radiating elements for transmitting and or receiving wireless signals. The antenna package and the semiconductor package may have dissimilar number of interconnect layers and/or dissimilar materials of construct.
    Type: Application
    Filed: February 12, 2020
    Publication date: June 11, 2020
    Inventors: Sidharth DALMIA, Ana M. YEPES, Pouya TALEBBEYDOKHTI, Miroslav BARYAKH, Omer ASAF
  • Patent number: 10566298
    Abstract: Wireless modules having a semiconductor package attached to an antenna package is disclosed. The semiconductor package may house one or more electronic components as a single die package and/or a system in a package (SiP) implementation. The antenna package may be communicatively coupled to the semiconductor package using by one or more coupling pads. The antenna package may further have one or more radiating elements for transmitting and or receiving wireless signals. The antenna package and the semiconductor package may have dissimilar number of interconnect layers and/or dissimilar materials of construct.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: February 18, 2020
    Assignee: Intel IP Corporation
    Inventors: Sidharth Dalmia, Ana M. Yepes, Pouya Talebbeydokhti, Miroslav Baryakh, Omer Asaf
  • Publication number: 20190035749
    Abstract: Wireless modules having a semiconductor package attached to an antenna package is disclosed. The semiconductor package may house one or more electronic components as a single die package and/or a system in a package (SiP) implementation. The antenna package may be communicatively coupled to the semiconductor package using by one or more coupling pads. The antenna package may further have one or more radiating elements for transmitting and or receiving wireless signals. The antenna package and the semiconductor package may have dissimilar number of interconnect layers and/or dissimilar materials of construct.
    Type: Application
    Filed: April 1, 2016
    Publication date: January 31, 2019
    Applicant: INTEL CORPORATION
    Inventors: Sidharth DALMIA, Ana M. YEPES, Pouya TALEBBEYDOKHTI, Miroslav BARYAKH, Omer ASAF