Abstract: An example power converter includes an energy transfer element, a switch, a feedback circuit, a feedforward circuit, and an integrated circuit controller. The integrated circuit controller includes a gain selector circuit and a switch duty cycle controller. The gain selector circuit selects a gain multiplier according to a value of a feedforward signal generated by the feedforward circuit and applies the gain multiplier to the feedforward signal to generate a duty cycle adjust signal. The switch duty cycle controller generates a drive signal to control the switch in response to a feedback signal generated by the feedback circuit. A duty cycle of the drive signal is varied in response to the duty cycle adjust signal such that the duty cycle varies according to a plurality of linear functions over a range of values of the feedforward signal.

Abstract: A switching circuit for use in a power converter includes a first active switch coupled between a first terminal of an input of the power converter and a first terminal of a primary winding of a transformer. A second active switch is coupled between a second terminal of the input and a second terminal of the primary winding. An output capacitance of the first active switch is greater than an output capacitance of the second active switch. A first passive switch is coupled between the second terminal of the primary winding and the first terminal of the input. A second passive switch is coupled between the second terminal of the input and the first terminal of the primary winding. A reverse recovery time of the first passive switch is greater than a reverse recovery time of the second passive switch.

Abstract: An example integrated circuit for use in a power supply includes a feedback terminal, a controller and a clamp. The feedback terminal is to be coupled to receive a feedback signal that is representative of a bias voltage across a bias winding of the power supply. The controller is to be coupled to control switching of a power switch included in the power supply in response to the feedback signal. The clamp is coupled to clamp the feedback terminal to a voltage for at least a time that the bias voltage is negative with respect to an input return of the power supply.

Abstract: A method for use in a power converter includes generating a peak input voltage signal that is representative of a peak value of the input voltage for phase angles less than a phase angle threshold and is representative of a value that is less than the peak value of the input voltage for phase angles greater than the phase angle threshold. The method also includes controlling a switching of a switch to regulate an output current of the power converter in response to the peak input voltage signal and the feedback signal. A compensation current is then added to the peak input voltage signal when the phase angle is greater than the phase angle threshold to allow for natural dimming at an output of the power converter.

Abstract: In one embodiment, a power integrated circuit device includes a main lateral high-voltage field-effect transistor (HVFET) and an adjacently-located lateral sense FET, both of which are formed on a high-resistivity substrate. A sense resistor is formed in a well region disposed in an area of the substrate between the HVFET and the sense FET. A parasitic substrate resistor is formed in parallel electrical connection with the sense resistor between the source regions of the HVFET and the sense FET. Both transistor devices share common drain and gate electrodes. When the main lateral HVFET and the sense FET are in an on-state, a voltage potential is produced at the second source metal layer that is proportional to a first current flowing through the lateral HVFET.

Abstract: An example power supply includes a first power converter, a second power converter, and a shared clamp reset circuit. The first power converter is adapted to convert an input to a first voltage output and includes a first diode and a first transformer having a first primary winding. The second power converter is adapted to convert the input to a second voltage output and includes a second diode and a second transformer having a second primary winding. The shared clamp reset circuit is included in the first power converter and is coupled to the cathode of the first diode. The shared clamp reset circuit also includes a clamp connection that is coupled to the cathode of the second diode. The shared clamp reset circuit is adapted to manage leakage inductance energy within the first transformer and within the second transformer.

Abstract: A power supply includes a forward converter having a first transformer coupled to an input of the power supply and to a first voltage output. The power supply also includes a separate flyback converter having a second transformer that is coupled to the input and to a second voltage output. A clamp reset circuit is coupled to the first transformer and to the second transformer. The clamp reset circuit includes a capacitor and a voltage limiting element. The voltage limiting element is coupled to prevent energy received at the capacitor from both the power converters from exceeding a threshold. The voltage limiting element limits a voltage on the capacitor.

Abstract: In one embodiment, a vertical HVFET includes a pillar of semiconductor material a pillar of semiconductor material arranged in a loop layout having at least two substantially parallel and substantially linear fillet sections each having a first width, and at least two rounded sections, the rounded sections having a second width narrower than the first width, a source region of a first conductivity type being disposed at or near a top surface of the pillar, and a body region of a second conductivity type being disposed in the pillar beneath the source region. First and second dielectric regions are respectively disposed on opposite sides of the pillar, the first dielectric region being laterally surrounded by the pillar, and the second dielectric region laterally surrounding the pillar. First and second field plates are respectively disposed in the first and second dielectric regions.

Abstract: A controller for use in a power converter includes a sensor coupled to receive a signal from a single terminal of the controller. The signal from the single terminal represents an output voltage of the power converter during at least a portion of an off time of a power switch and a line input voltage during a portion of an on time of the power switch. A switching control is to be coupled to switch the power switch to regulate the output of the power converter in response to the sensor. A power limiter is coupled to the sensor to output a power limit signal to the switching control in response to the line input voltage of the power converter. The switching control is further coupled to switch the power switch to regulate the output of the power converter in response to the power limit signal.

Abstract: A circuit includes input drain, source and gate nodes. The circuit also includes a group III nitride enhancement-mode HFET having a source, drain and gate and a voltage shifter having a first terminal connected to the gate of the enhancement mode HFET at a common junction. The circuit also includes a load resistive element connected to the common junction. The drain of the enhancement-mode HFET serves as the input drain node, the source of the enhancement-mode HFET serves as the input source node and a second terminal of the voltage shifter serves as the input gate node.

Abstract: A control circuit includes a feedback circuit, a drive signal generator, an unregulated dormant mode and output reset control circuit, and a counter. The feedback circuit generates an enable signal and in response, the drive signal generator regulates the output of the power converter. The unregulated dormant mode and output reset control circuit powers down the drive signal generator such that the regulation is ceased when the energy requirement at the output has fallen below a threshold. The drive signal generator is then powered up after a first period of time such that the regulation resumes. The counter then counts cycles of a clock signal for which the enable signal indicates an increase in the energy requirement at the output. The counter disables the drive signal generator when a count of the counter reaches a threshold number to discharge the output to less than a regulation output voltage value.

Abstract: An example controller for use in a power supply includes a zero crossing detection (ZCD) circuit, a threshold detection circuit, and a punctuated switching control circuit. The ZCD circuit generates a ZCD signal that pulses each zero-crossing of an ac input voltage. The threshold detection circuit receives and compares an output of the power supply with a threshold reference. The punctuated switching control circuit generates a switching signal to control a switch to regulate the output of the power supply. The switching signal is generated to have intervals of switching and intervals of no switching, where each interval of switching begins responsive to the output of the power supply dropping below the threshold reference and each interval of no switching begins responsive to the output rising above the threshold reference. Each interval has a beginning that is synchronized with a pulse of the ZCD signal.

Abstract: A junction barrier Schottky (JBS) rectifier device and a method of making the device are described. The device comprises an epitaxially grown first n-type drift layer and p-type regions forming p+-n junctions and self-planarizing epitaxially over-grown second n-type drift regions between and, optionally, on top of the p-type regions. The device may include an edge termination structure such as an exposed or buried P+ guard ring, a regrown or implanted junction termination extension (JTE) region, or a “deep” mesa etched down to the substrate. The Schottky contact to the second n-type drift region and the ohmic contact to the p-type region together serve as an anode. The cathode can be formed by ohmic contact to the n-type region on the backside of the wafer. The devices can be used in monolithic digital, analog, and microwave integrated circuits.

Abstract: A power converter includes a current controller coupled to an energy transfer element to selectively enable a first, second or third current in the current controller. The first current is substantially zero, the second current is greater than the third current, and the third current is greater than the first current. The third current only partially discharges a capacitance coupled to the energy transfer element and the current controller. A control circuit is to be coupled to the current controller to selectively enable the first, second or third current in the current controller. A first feedback circuit is coupled to generate a first feedback signal while the first current is enabled by the current controller after a full discharge pulse. A second feedback circuit is coupled to generate a second feedback signal while the first current is enabled in the controller after a partial discharge pulse.

Abstract: A power converter includes a dc input having first and second terminals. A main converter is coupled to the first terminal of the dc input. A standby circuit coupled to the second terminal of the dc input and the main converter. The main converter is coupled to control a transfer of energy from the dc input through the standby circuit to a main output of the main converter during a normal operating condition of the power supply. The standby circuit is coupled to decouple the main converter from the second terminal of the dc input during a standby operating condition of the power converter. A standby converter is coupled to the first and second terminals of the dc input to control a transfer of energy from the dc input to a standby output of the standby converter during the standby operating condition of the power converter.

Abstract: An example controller for a primary side control power converter includes a feedback circuit, a driver circuit, and an adjustable voltage reference circuit. The feedback circuit compares a feedback signal representative of a bias winding voltage of the power converter with a voltage reference. The driver circuit outputs a switching signal having a switching period to control a switch to regulate an output of the power converter in response to the feedback signal and enables or disables a switching period based on the output of the feedback circuit. The adjustable voltage reference circuit adjusts the voltage reference by a first amount in response to a first number of disabled switching periods indicating a first load condition at the output of the power converter and by a second amount in response to a second number of disabled switching periods indicating a second load condition at the output of the power converter.

Abstract: A controller for use in a power supply includes a drive signal generator, a jitter signal generator, a compensator signal generator, and an arithmetic operator. The drive signal generator is coupled to output a drive signal in response to an input signal. The jitter signal generator is coupled to provide a jitter signal that is representative of a first percentage amount to modulate a switching period of the drive signal. The compensator signal generator is coupled to provide a compensator signal responsive to the jitter signal, where the compensator signal is representative of a second percentage amount to change a duty ratio of the drive signal. The arithmetic operator adjusts the input signal of the controller in response to the compensator signal to provide a compensated input signal, where the duty ratio of the drive signal is adjusted by the second percentage amount in response to the compensated input signal.

Abstract: A power converter controller includes a drive circuit coupled to control switching of a power switch coupled to an energy transfer element and an input of the power converter. An output voltage sensor including first and second pulse sampler circuits is coupled to capture first and second peak voltages, respectively, that are representative of a second peak of a ringing voltage of a feedback signal representative of an output of the power converter. The first pulse sampler circuit is coupled to capture the first peak voltage at a first time in the feedback signal. The second pulse sampler circuit is coupled to capture the second peak voltage at a second time in the feedback signal. The drive circuit is coupled to receive a change signal from the output voltage sensor in response to the first and second peak voltages.

Abstract: A method of operation for flyback power converter includes operating a controller of the flyback power converter in a regulation mode when a control signal is below a first threshold. The control signal is provided as an input to a terminal of the flyback power converter. When the control signal is below a second threshold and above the first threshold, the controller is operated in a limiting mode. The controller is operated in an external command mode when the control signal is below a third threshold and above the second threshold. Lastly, when the control signal is above the third threshold, the controller is operated in a protection mode.

Abstract: A method for programming a programmable block of a power IC device includes selecting an anti-fuse element of the programmable block to be programmed. The anti-fuse element includes first and second capacitive plates separated by a dielectric layer. A voltage pulse is then applied to a pin of the power IC device. The pin is connected to a drain of a high-voltage field-effect transistor (HVFET) that drives an external load via the pin during a normal operating mode of the power IC device.