Patents by Inventor Prabhakar Pati Tripathi

Prabhakar Pati Tripathi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of forming metal fuses in CMOS processes with copper interconnect
    Patent number: 6828653
    Abstract: The present invention provides a method of forming a semiconductor device fuse and a semiconductor device fuse structure. A first dielectric layer is formed on top of a metal layer in a semiconductor device. The dielectric layer is patterned to provide access to at least two contacts in the metal layer. A conductive metal layer is deposited and patterned to form a fuse between the fuse contacts. A second dielectric layer is deposited on the conductive metal layer.
    Type: Grant
    Filed: October 3, 2003
    Date of Patent: December 7, 2004
    Assignee: LSI Logic Corporation
    Inventors: Ruggero Castagnetti, Prabhakar Pati Tripathi, Ramnath Venkatraman
  • Method of forming metal fuses in CMOS processes with copper interconnect
    Patent number: 6664141
    Abstract: The present invention provides a method of forming a semiconductor device fuse and a semiconductor device fuse structure. A first dielectric layer is formed on top of a metal layer in a semiconductor device. The dielectric layer is patterned to provide access to at least two contacts in the metal layer. A conductive metal layer is deposited and patterned to form a fuse between the fuse contacts. A second dielectric layer is deposited on the conductive metal layer.
    Type: Grant
    Filed: November 14, 2001
    Date of Patent: December 16, 2003
    Assignee: LSI Logic Corporation
    Inventors: Ruggero Castagnetti, Prabhakar Pati Tripathi, Ramnath Venkatraman