Patents by Inventor Prabhjot Singh

Prabhjot Singh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8345488
    Abstract: A flash memory array comprises a plurality of memory cells organized in a matrix of rows and columns. Each of the memory cells includes a floating gate memory transistor having a source region and a drain region, and a coupling capacitor electrically connected to the memory transistor. A plurality of word lines are each electrically connected to the capacitor in each of the memory cells in a respective row. A first set of bit lines are each electrically connected to the drain region of the memory transistor in each of the memory cells in a respective column. A plurality of high voltage access transistors are each electrically connected to a bit line in the first set of bit lines. A second set of bit lines are each electrically connected to the source region of the memory transistor in each of the memory cells in a respective column.
    Type: Grant
    Filed: April 6, 2011
    Date of Patent: January 1, 2013
    Assignee: Intersil Americas Inc.
    Inventors: Hosam Haggag, Alexander Kalnitsky, Edgardo Laber, Prabhjot Singh, Michael D. Church
  • Publication number: 20120317771
    Abstract: An apparatus and method are provided for servicing a dynamoelectric machine component. The apparatus includes a tool delivery mechanism adapted for delivering a tool to a desired location in the dynamoelectric machine, and a tool support fixture adapted to be secured onto the body of the dynamoelectric machine, where the tool support fixture can be used for supporting and adjusting the tool delivery mechanism. A sleeve mechanism is attached to the tool support fixture, and the sleeve mechanism is disposed around a portion of the tool delivery mechanism. The apparatus is adapted to service the component of the dynamoelectric machine in-situ.
    Type: Application
    Filed: June 16, 2011
    Publication date: December 20, 2012
    Inventors: Zhipeng Zhang, Philip Alexander Shoemaker, Robert Jeffrey Pieciuk, Weston Blaine Griffin, Arvind Rangarajan, Diego Quinones, Prabhjot Singh
  • Publication number: 20120293646
    Abstract: A system and method for monitoring system including a embedded sensor coupled to an article, wherein the embedded sensor is a direct write embedded sensor using a high temperature light emitting material. A camera system detects illumination signals from the embedded sensors. A processing section processes the illumination signals and determines gas/surface temperatures and strain data for the article.
    Type: Application
    Filed: May 9, 2012
    Publication date: November 22, 2012
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Prabhjot Singh, Guanghua Wang, Mark Allen Cheverton, Jeffrey Joseph Popielarczyk, Joseph John Shiang
  • Publication number: 20120293647
    Abstract: A system and method for monitoring system including a three dimensional embedded sensor coupled to an article, wherein the three dimensional embedded sensor is a direct write embedded sensor using a high temperature light emitting material. A camera system detects illumination signals from the embedded sensors. A processing section processes the illumination signals and determines gas/surface temperatures and strain data for the article.
    Type: Application
    Filed: May 9, 2012
    Publication date: November 22, 2012
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Prabhjot Singh, Guanghua Wang, Mark Allen Cheverton, Jeffrey Joseph Popielarczyk, Joseph John Shiang
  • Publication number: 20120239961
    Abstract: A synchronous data processing system includes a memory module to store data and a memory controller coupled to the memory module. The memory controller includes a clock inverter to receive an input clock signal and to transmit an inverted clock signal to the memory module. The inverted clock signal incurs a first propagation delay prior to reaching the memory module as a memory clock signal. A write data buffer is coupled to the memory module. The write data buffer transmits data to the memory module in response to the input clock signal. An asynchronous first-in-first-out (ASYNC FIFO) buffer is coupled to the memory module. The ASYNC FIFO buffer reads data from the memory module in response to a feedback signal generated by feeding back the memory clock signal to the ASYNC FIFO buffer.
    Type: Application
    Filed: March 18, 2011
    Publication date: September 20, 2012
    Applicant: FREESCALE SEMICONDUCTOR, INC
    Inventors: Prakash Makwana, Prabhjot Singh
  • Publication number: 20120166102
    Abstract: A method and system for monitoring creep in a moving object are provided. The creep monitoring system includes a creep sensor assembly formed onto a surface of an object rotatable about an axis, the creep sensor assembly includes at least one of an image pattern and a radio frequency interrogatable circuit. The creep monitoring system also includes an online monitoring system communicatively coupled to the creep sensor assembly. The online monitoring system configured to collect information from the creep sensor assembly relative to an amount and a rate of creep of the object. The creep monitoring system also includes a processor programmed to receive the information, correct the information for movement of the creep sensor assembly during the collection, and determine a creep rate, a crack presence, and a temperature of the object simultaneously.
    Type: Application
    Filed: December 23, 2010
    Publication date: June 28, 2012
    Inventors: Edward James Nieters, James Anthony Ruud, Kevin George Harding, Wayne Charles Hasz, Emad Andarawis Andarawis, Thomas James Batzinger, Nirm Velumylum Nirmalan, Prabhjot Singh, Guanghua Wang
  • Patent number: 8205500
    Abstract: An ultrasound inspection system is provided for inspecting an object. The inspection system includes an ultrasound probe configured to scan the object and acquire a plurality of ultrasound scan data. The inspection system further includes a processor coupled to the ultrasound probe and configured to apply a transfer function to the ultrasound scan data to compensate for distortion of a plurality of ultrasound signals through the object and thereby generate a plurality of compensated ultrasound scan data, and to process the compensated ultrasonic scan data to characterize a feature in the object.
    Type: Grant
    Filed: November 25, 2008
    Date of Patent: June 26, 2012
    Assignee: General Electric Company
    Inventors: Yanyan Wu, Edward James Nieters, Thomas James Batzinger, Nicholas Joseph Kray, James Norman Barshinger, Jian Li, Waseem Ibrahim Faidi, Prabhjot Singh, Francis Howard Little, Michael Everett Keller, Timothy Jesse Sheets
  • Publication number: 20120102834
    Abstract: A gasifier system which includes a reactor; a feedstock inlet; an oxidant inlet; a raw product gas outlet; and a recycle conduit, is provided. The reactor usually includes an upper section, a central section, and a lower section. The feedstock inlet is disposed in the upper section of the reactor to receive a carbonaceous feedstock. The oxidant inlet is disposed in the lower section of the reactor to receive an oxidant. The raw product gas outlet is disposed in the upper section of the reactor. The recycle conduit is configured to couple the raw product gas outlet to the lower section of the reactor, and to recycle a raw product gas from the upper section of the reactor to the lower section of the reactor. A method for converting a carbonaceous stream into a product gas in a gasifier system is also provided.
    Type: Application
    Filed: October 29, 2010
    Publication date: May 3, 2012
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Surinder Prabhjot Singh, Vitali V. Lissianski, Aaron John Avagliano, Wolfgang Madl
  • Publication number: 20120029252
    Abstract: A method for producing a fuel composition from a feedstock which may contain biomass and municipal solid waste is described. The method includes the step of pyrolyzing the feedstock in the presence of a transition metal, using microwave energy, so that the level of oxygen in at least one product of the pyrolysis is reduced. An integrated process is also described, in which the transition metal can be regenerated. Moreover, pyrolysis products such as bio-oils can be upgraded to liquid fuel compositions. Related systems for producing fuel compositions are also described.
    Type: Application
    Filed: July 28, 2010
    Publication date: February 2, 2012
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Vitali Victor Lissianski, R. George Rizeq, Surinder Prabhjot Singh
  • Publication number: 20120024843
    Abstract: A method of treating a carbonaceous material is disclosed. The method includes heating the carbonaceous material in a reactor with microwave energy, at a pressure less than about 5 atmospheres, to generate a mixture comprising char, oil and gas.
    Type: Application
    Filed: July 30, 2010
    Publication date: February 2, 2012
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Vitali V. Lissianski, R. George Rizeq, Raul Fernando Subia, Surinder Prabhjot Singh
  • Patent number: 8010315
    Abstract: An inspection method is provided and includes acquiring at least one inspection data set. Each inspection data set comprises inspection data for a component. The inspection method further includes mapping the inspection data set onto a three-dimensional (3D) model of the component, to generate a 3D inspection model for the component, and validating the inspection data against the 3D model of the component using at least one validation criterion. A multi-modality inspection method is also provided and includes acquiring multiple inspection data sets corresponding to multiple inspection modalities for a component and fusing the inspection data sets to form a fused data set. The multi-modality inspection method further includes mapping the fused data set onto a 3D model of the component to generate a 3D multi-modality inspection model for the component.
    Type: Grant
    Filed: November 27, 2007
    Date of Patent: August 30, 2011
    Assignee: General Electric Company
    Inventors: Yanyan Wu, Francis Howard Little, Prabhjot Singh
  • Publication number: 20110182126
    Abstract: A flash memory array comprises a plurality of memory cells organized in a matrix of rows and columns. Each of the memory cells includes a floating gate memory transistor having a source region and a drain region, and a coupling capacitor electrically connected to the memory transistor. A plurality of word lines are each electrically connected to the capacitor in each of the memory cells in a respective row. A first set of bit lines are each electrically connected to the drain region of the memory transistor in each of the memory cells in a respective column. A plurality of high voltage access transistors are each electrically connected to a bit line in the first set of bit lines. A second set of bit lines are each electrically connected to the source region of the memory transistor in each of the memory cells in a respective column.
    Type: Application
    Filed: April 6, 2011
    Publication date: July 28, 2011
    Applicant: INTERSIL AMERICAS INC.
    Inventors: Hosam Haggag, Alexander Kalnitsky, Edgardo Laber, Prabhjot Singh, Michael D. Church
  • Patent number: 7944745
    Abstract: A flash memory array comprises a plurality of memory cells organized in a matrix of rows and columns. Each of the memory cells includes a floating gate memory transistor having a source region and a drain region, and a coupling capacitor electrically connected to the memory transistor. A plurality of word lines are each electrically connected to the capacitor in each of the memory cells in a respective row. A first set of bit lines are each electrically connected to the drain region of the memory transistor in each of the memory cells in a respective column. A plurality of high voltage access transistors are each electrically connected to a bit line in the first set of bit lines. A second set of bit lines are each electrically connected to the source region of the memory transistor in each of the memory cells in a respective column.
    Type: Grant
    Filed: February 24, 2010
    Date of Patent: May 17, 2011
    Assignee: Intersil Americas Inc.
    Inventors: Hosam Haggag, Alexander Kalnitsky, Edgardo Laber, Prabhjot Singh, Michael D. Church
  • Publication number: 20100307960
    Abstract: A process for the plasma-assisted treatment of coal in which coal is directly converted to heavy hydrocarbons. The first step in the process is direct conversion of coal to aliphatic hydrocarbons under plasma conditions in the presence of light hydrocarbons, such as natural gas. In the second process step, the aliphatic hydrocarbons are upgraded to a liquid fuel. The energy for the process can be provided by radio frequency energy, such as microwave energy, that is powered by a renewable energy source. The process has flexibility to adjust aromatic content in the fuel to match fuel specification requirements.
    Type: Application
    Filed: June 5, 2009
    Publication date: December 9, 2010
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Vitali Victor Lissianski, Anthony Mark Thompson, Daniel Lawrence Derr, Gregg Anthony Deluga, Ramanathan Subramanian, Surinder Prabhjot Singh
  • Patent number: 7840367
    Abstract: An inspection artifact includes a central portion and multiple optical and coordinate measurement machine (CMM) alignment features arranged on the central portion. The optical and CMM alignment features are configured to align the coordinates for an optical or a CMM measurement system to a common coordinate system. Another inspection artifact includes a central portion and multiple computed tomography (CT) alignment features arranged on the central portion. The CT alignment features are configured to align the coordinates for a CT system to a common coordinate system.
    Type: Grant
    Filed: November 28, 2007
    Date of Patent: November 23, 2010
    Assignee: General Electric Company
    Inventors: Francis Howard Little, Yanyan Wu, Prabhjot Singh
  • Publication number: 20100200189
    Abstract: A method for making a turbine airfoil includes providing a mold core and an outer shell which cooperatively define a cavity in the shape of a hollow airfoil having an outer wall, a root, and a tip. A tip portion of the core extends completely through the portion of the cavity defining the tip of the airfoil. The core is restrained to prevent movement between the core and outer shell. Molten metal is introduced into the cavity and solidified to form an airfoil having at least one outer wall which defines an open tip and a hollow interior. A metallic tip cap is formed on the outer wall which substantially closes off the open tip. The tip cap may be formed by packing the airfoil with metallic powder; and laser sintering the exposed powder so as to form a tip cap which is metallurgically bonded to the outer wall.
    Type: Application
    Filed: February 12, 2009
    Publication date: August 12, 2010
    Applicant: General Electric Company
    Inventors: Huan Qi, Magdi Azer, Prabhjot Singh, Todd Jay Rockstroh, Sudhir K. Tewari, Joseph Giancarlo Sabato, Donald Brett Desander, Mark Douglas Gledhill
  • Publication number: 20100149879
    Abstract: A flash memory array comprises a plurality of memory cells organized in a matrix of rows and columns. Each of the memory cells includes a floating gate memory transistor having a source region and a drain region, and a coupling capacitor electrically connected to the memory transistor. A plurality of word lines are each electrically connected to the capacitor in each of the memory cells in a respective row. A first set of bit lines are each electrically connected to the drain region of the memory transistor in each of the memory cells in a respective column. A plurality of high voltage access transistors are each electrically connected to a bit line in the first set of bit lines. A second set of bit lines are each electrically connected to the source region of the memory transistor in each of the memory cells in a respective column.
    Type: Application
    Filed: February 24, 2010
    Publication date: June 17, 2010
    Applicant: INTERSIL AMERICAS INC.
    Inventors: Hosam Haggag, Alexander Kalnitsky, Edgardo Laber, Prabhjot Singh, Michael D. Church
  • Publication number: 20100126277
    Abstract: An ultrasound inspection system is provided for inspecting an object. The inspection system includes an ultrasound probe configured to scan the object and acquire a plurality of ultrasound scan data. The inspection system further includes a processor coupled to the ultrasound probe and configured to apply a transfer function to the ultrasound scan data to compensate for distortion of a plurality of ultrasound signals through the object and thereby generate a plurality of compensated ultrasound scan data, and to process the compensated ultrasonic scan data to characterize a feature in the object.
    Type: Application
    Filed: November 25, 2008
    Publication date: May 27, 2010
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Yanyan Wu, Edward James Nieters, Thomas James Batzinger, Nicholas Joseph Kray, James Norman Barshinger, Jian Li, Waseem Ibrahim Faidi, Prabhjot Singh, Francis Howard Little, Michael Everett Keller, Timothy Jesse Sheets
  • Patent number: 7688627
    Abstract: A flash memory array comprises a plurality of memory cells organized in a matrix of rows and columns. Each of the memory cells includes a floating gate memory transistor having a source region and a drain region, and a coupling capacitor electrically connected to the memory transistor. A plurality of word lines are each electrically connected to the capacitor in each of the memory cells in a respective row. A first set of bit lines are each electrically connected to the drain region of the memory transistor in each of the memory cells in a respective column. A plurality of high voltage access transistors are each electrically connected to a bit line in the first set of bit lines. A second set of bit lines are each electrically connected to the source region of the memory transistor in each of the memory cells in a respective column.
    Type: Grant
    Filed: September 25, 2007
    Date of Patent: March 30, 2010
    Assignee: Intersil Americas Inc.
    Inventors: Hosam Haggag, Alexander Kalnitsky, Edgardo Laber, Prabhjot Singh, Michael D. Church
  • Publication number: 20090265739
    Abstract: The present invention discloses a system and method for channel selection in a digital broadcast reception terminal. The system tunes to different frequencies and generates visual clips corresponding to a plurality of channels in a frequency band. Visual clips of multiple channels are simultaneously displayed on a display screen which provides the user an easy way to select a desired program.
    Type: Application
    Filed: April 18, 2008
    Publication date: October 22, 2009
    Applicant: STMicroelectronics Pvt. Ltd.
    Inventors: Prabhjot Singh ARORA, Kaushik Saha