Abstract: An apparatus includes control circuits to connect to planes of a memory array. The control circuits are configured to apply leak-detection voltages to selected blocks, each selected block located in a respective plane of the memory array, obtain a leak-detection indicator for each selected block in parallel and compare each leak-detection indicator with a reference in series.

Abstract: A charge pump with a programmable architecture generates a deeper negative voltage to reduce chip area requirements and lower current consumption at chip-level. A set of serially connected charge transfer switches are connected between an input node, that can be set at ground or other low voltage, and an output node providing the negative voltage. Stage capacitors each have one plate connected between a pair of the charge transfer switches and a second plate receiving one of a pair of non-overlapping clock signals having an amplitude of the charge pump supply level. The charge transfer switches receive control signals to be alternately on or off and, when off, the output of the charge transfer switch is shorted to its control gate. Different input voltage levels can be selected and used to pre-charge the control gate of the first of the charge transfer switches to provide different output nodes.

Abstract: A stage-based frequency optimization for a charge pump achieves a higher area efficiency by operating different stages of the charge pump at their optimized frequency simultaneously, instead of single common frequency, to obtain greater output strength. A first set of stages uses triple well devices as transfer switches and operates at a first, higher frequency. The first stages supply a second set of stages using high voltage devices as transfer switches and operates at a second, lower frequency. The two set of stages are connected through a frequency transition circuit.

Abstract: A stage-based frequency optimization for a charge pump achieves a higher area efficiency by operating different stages of the charge pump at their optimized frequency simultaneously, instead of single common frequency, to obtain greater output strength. A first set of stages uses triple well devices as transfer switches and operates at a first, higher frequency. The first stages supply a second set of stages using high voltage devices as transfer switches and operates at a second, lower frequency. The two set of stages are connected through a frequency transition circuit.