Patents by Inventor Pradeep Pandey
Pradeep Pandey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190016753Abstract: Charge variants of a recombinantly expressed antibody population may be separated both from the main antibody molecule and from each other. Separation and isolation of charge variants may proceed via a combined modulation of salt concentration and pH during charge variant elution from a cation exchange support. Isolated charge variants may be assessed for their contribution to the potency of the overall antibody preparation. The make-up of an antibody preparation, at least in terms of the proportion of charge variants and of the main antibody can thus be controlled, for example, for biosimilar matching or for improving potency of the preparation.Type: ApplicationFiled: January 6, 2017Publication date: January 17, 2019Inventors: Eun JANG, Pradeep PANDEY, Kaushal JERAJANI, Scott GANGLOFF
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Patent number: 7838072Abstract: An adaptive real time thermal processing system is presented that includes a multivariable controller. The method includes creating a dynamic model of the MLD processing system and incorporating virtual sensors in the dynamic model. The method includes using process recipes comprising intelligent set points, dynamic models, and/or virtual sensors.Type: GrantFiled: January 26, 2005Date of Patent: November 23, 2010Assignee: Tokyo Electron LimitedInventors: Sanjeev Kaushal, Pradeep Pandey, Kenji Sugishima
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Patent number: 7526699Abstract: A method of monitoring a processing system in real-time using low-pressure based modeling techniques that include processing one or more of wafers in a processing chamber, calculating dynamic estimation errors for the precursor and/or purging process, and determining if the dynamic estimation errors can be associated with pre-existing BIST rules for the process. When the dynamic estimation error cannot be associated with a pre-existing BIST rule, the method includes either modifying the BIST table by creating a new BIST rule for the process, or stopping the process when a new BIST rule cannot be created.Type: GrantFiled: March 31, 2006Date of Patent: April 28, 2009Assignee: Tokyo Electron LimitedInventors: Sanjeev Kaushal, Pradeep Pandey, Kenji Sugishima
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Patent number: 7519885Abstract: A method of monitoring a processing system in real-time using low-pressure based modeling techniques that include processing one or more of wafers in a processing chamber; determining a measured dynamic process response for a rate of change for a process parameter; executing a real-time dynamic model to generate a predicted dynamic process response; determining a dynamic estimation error using a difference between the predicted dynamic process response and the expected process response; and comparing the dynamic estimation error to operational limits.Type: GrantFiled: March 31, 2006Date of Patent: April 14, 2009Assignee: Tokyo Electron LimitedInventors: Sanjeev Kaushal, Pradeep Pandey, Kenji Sugishima
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Patent number: 7459175Abstract: An adaptive real time thermal processing system is presented that includes a multivariable controller. The method includes creating a dynamic model of the MLD processing system and incorporating virtual sensors in the dynamic model. The method includes using process recipes comprising intelligent set points, dynamic models, and/or virtual sensors.Type: GrantFiled: January 26, 2005Date of Patent: December 2, 2008Assignee: Tokyo Electron LimitedInventors: Sanjeev Kaushal, Pradeep Pandey, Kenji Sugishima
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Patent number: 7452793Abstract: A method of determining wafer curvature in real-time is presented. The method includes establishing a first temperature profile for a hotplate surface, where the hotplate surface is divided into a plurality of temperature control zones. The method further includes positioning a wafer at a first height above the hotplate surface and determining a second temperature profile for the hotplate surface. The wafer curvature is then determined by using the second temperature profile. Also, a dynamic model of a processing system is presented and wafer curvature can be incorporated into the dynamic model.Type: GrantFiled: March 30, 2005Date of Patent: November 18, 2008Assignee: Tokyo Electron LimitedInventors: Sanjeev Kaushal, Kenji Sugishima, Pradeep Pandey
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Patent number: 7444572Abstract: A method of creating and/or modifying a built-in self test (BIST) table for monitoring a thermal processing system in real-time that includes positioning a plurality of wafers in a processing chamber in the thermal processing system; executing a real-time dynamic model to generate a predicted dynamic process response; creating a measured dynamic process response; determining a dynamic estimation error; determining if the determined dynamic estimation error can be associated with a pre-existing BIST rule in the BIST table; creating a new BIST rule when the dynamic estimation error cannot be associated with any pre-existing BIST rule in the BIST table; and stopping the process when a new BIST rule cannot be created.Type: GrantFiled: September 1, 2005Date of Patent: October 28, 2008Assignee: Tokyo Electron LimitedInventors: Sanjeev Kaushal, Pradeep Pandey, Kenji Sugishima
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Patent number: 7406644Abstract: A method of monitoring a thermal processing system in real-time using a built-in self test (BIST) table to detect, diagnose and/or predict fault conditions and/or degraded performance. The method includes positioning a plurality of wafers in a processing chamber in the thermal processing system, performing a self test process, determining a real-time transient error from a measured transient response and a baseline transient response determined by a BIST rule stored in the BIST table, and comparing the transient error to operational limits and warning limits established by the BIST rule for the self test process.Type: GrantFiled: March 30, 2006Date of Patent: July 29, 2008Assignee: Tokyo Electron LimitedInventors: Sanjeev Kaushal, Pradeep Pandey, Kenji Sugishima
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Patent number: 7340377Abstract: A method of monitoring a single-wafer processing system in real-time using low-pressure based modeling techniques that include processing a wafer in a processing chamber; determining a measured dynamic process response for a rate of change for a process parameter; executing a real-time dynamic model to generate a predicted dynamic process response; determining a dynamic estimation error using a difference between the predicted dynamic process response and the expected process response; and comparing the dynamic estimation error to operational limits.Type: GrantFiled: July 6, 2006Date of Patent: March 4, 2008Assignee: Tokyo Electron LimitedInventors: Sanjeev Kaushal, Pradeep Pandey, Kenji Sugishima
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Patent number: 7302363Abstract: A method of monitoring a processing system in real-time using low-pressure based modeling techniques that include processing one or more of wafers in a processing chamber; determining a measured dynamic process response for a rate of change for a process parameter; executing a real-time dynamic model to generate a predicted dynamic process response; determining a dynamic estimation error using a difference between the predicted dynamic process response and the expected process response; and comparing the dynamic estimation error to operational limits.Type: GrantFiled: March 31, 2006Date of Patent: November 27, 2007Assignee: Tokyo Electron LimitedInventors: Sanjeev Kaushal, Pradeep Pandey, Kenji Sugishima
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Publication number: 20070259285Abstract: A method of monitoring a processing system in real-time using low-pressure based modeling techniques that include processing one or more of wafers in a processing chamber, calculating dynamic estimation errors for the precursor and/or purging process, and determining if the dynamic estimation errors can be associated with pre-existing BIST rules for the process. When the dynamic estimation error cannot be associated with a pre-existing BIST rule, the method includes either modifying the BIST table by creating a new BIST rule for the process, or stopping the process when a new BIST rule cannot be created.Type: ApplicationFiled: March 31, 2006Publication date: November 8, 2007Applicant: Tokyo Electron LimitedInventors: Sanjeev Kaushal, Pradeep Pandey, Kenji Sugishima
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Publication number: 20070255991Abstract: A method of monitoring a thermal processing system in real-time using a built-in self test (BIST) table to detect, diagnose and/or predict fault conditions and/or degraded performance. The method includes positioning a plurality of wafers in a processing chamber in the thermal processing system, performing a self test process, determining a real-time transient error from a measured transient response and a baseline transient response determined by a BIST rule stored in the BIST table, and comparing the transient error to operational limits and warning limits established by the BIST rule for the self test process.Type: ApplicationFiled: March 30, 2006Publication date: November 1, 2007Applicant: Tokyo Electron LimitedInventors: Sanjeev Kaushal, Pradeep Pandey, Kenji Sugishima
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Publication number: 20070234953Abstract: A method of monitoring a processing system in real-time using low-pressure based modeling techniques that include processing one or more of wafers in a processing chamber; determining a measured dynamic process response for a rate of change for a process parameter; executing a real-time dynamic model to generate a predicted dynamic process response; determining a dynamic estimation error using a difference between the predicted dynamic process response and the expected process response; and comparing the dynamic estimation error to operational limits.Type: ApplicationFiled: March 31, 2006Publication date: October 11, 2007Applicant: Tokyo Electron LimitedInventors: Sanjeev Kaushal, Pradeep Pandey, Kenji Sugishima
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Publication number: 20070239375Abstract: A method of monitoring a processing system in real-time using low-pressure based modeling techniques that include processing one or more of wafers in a processing chamber; determining a measured dynamic process response for a rate of change for a process parameter; executing a real-time dynamic model to generate a predicted dynamic process response; determining a dynamic estimation error using a difference between the predicted dynamic process response and the expected process response; and comparing the dynamic estimation error to operational limits.Type: ApplicationFiled: March 31, 2006Publication date: October 11, 2007Applicant: Tokyo Electron LimitedInventors: Sanjeev Kaushal, Pradeep Pandey, Kenji Sugishima
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Publication number: 20070233427Abstract: A method of monitoring a single-wafer processing system in real-time using low-pressure based modeling techniques that include processing a wafer in a processing chamber; determining a measured dynamic process response for a rate of change for a process parameter; executing a real-time dynamic model to generate a predicted dynamic process response; determining a dynamic estimation error using a difference between the predicted dynamic process response and the expected process response; and comparing the dynamic estimation error to operational limits.Type: ApplicationFiled: July 6, 2006Publication date: October 4, 2007Applicant: TOKYO ELECTRON LIMITEDInventors: Sanjeev Kaushal, Pradeep Pandey, Kenji Sugishima
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Publication number: 20070061652Abstract: A method of creating and/or modifying a built-in self test (BIST) table for monitoring a thermal processing system in real-time that includes positioning a plurality of wafers in a processing chamber in the thermal processing system; executing a real-time dynamic model to generate a predicted dynamic process response; creating a measured dynamic process response; determining a dynamic estimation error; determining if the determined dynamic estimation error can be associated with a pre-existing BIST rule in the BIST table; creating a new BIST rule when the dynamic estimation error cannot be associated with any pre-existing BIST rule in the BIST table; and stopping the process when a new BIST rule cannot be created.Type: ApplicationFiled: September 1, 2005Publication date: March 15, 2007Applicant: Tokyo Electron Limited, TBS Broadcast CenterInventors: Sanjeev Kaushal, Pradeep Pandey, Kenji Sugishima
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Patent number: 7165011Abstract: A method of monitoring a thermal processing system in real-time using a built-in self test (BIST) table that includes positioning a plurality of wafers in a processing chamber in the thermal processing system; executing a real-time dynamic model to generate a predicted dynamic process response for the processing chamber during the processing time; creating a first measured dynamic process response; determining a dynamic estimation error using a difference between the predicted dynamic process response and the measured dynamic process response; and comparing the dynamic estimation error to operational thresholds established by one or more rules in the BIST table.Type: GrantFiled: September 1, 2005Date of Patent: January 16, 2007Assignee: Tokyo Electron LimitedInventors: Sanjeev Kaushal, Pradeep Pandey, Kenji Sugishima, Anthony Dip, David Smith, Raymond Joe, Sundar Gandhi
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Publication number: 20060241891Abstract: A method of determining wafer curvature in real-time is presented. The method includes establishing a first temperature profile for a hotplate surface, where the hotplate surface is divided into a plurality of temperature control zones. The method further includes positioning a wafer at a first height above the hotplate surface and determining a second temperature profile for the hotplate surface. The wafer curvature is then determined by using the second temperature profile. Also, a dynamic model of a processing system is presented and wafer curvature can be incorporated into the dynamic model.Type: ApplicationFiled: March 30, 2005Publication date: October 26, 2006Inventors: Sanjeev Kaushal, Kenji Sugishima, Pradeep Pandey
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Patent number: 7126957Abstract: A system for transmitting real-time data between an asynchronous network (104) and a synchronous network (106) is disclosed. A method (100) may include an ingress path (102) for transmitting data from an asynchronous system (104) to a synchronous system (106), and an egress path (108) for transmitting data from a synchronous system (106) to an asynchronous system (104). An ingress path (102) may include a packet receiver (110) and write to synchronous system (112) steps. An egress path (108) may include read from synchronous system (114), packetizer (116), and packet transmitter (118) steps.Type: GrantFiled: March 7, 2002Date of Patent: October 24, 2006Assignee: UTStarcom, Inc.Inventors: Sridhar G. Sharma Isukapalli, Pradeep Pandey, Matthew D. Shaver, Neal A. Schneider, Gary Tsztoo
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Patent number: 7101816Abstract: Methods for adaptive real time control of a system for thermal processing substrates, such as semiconductor wafers and display panels. Generally, the method includes creating a dynamic model of the thermal processing system, incorporating wafer bow in the dynamic model, coupling a diffusion-amplification model into the dynamic thermal model, creating a multivariable controller, parameterizing the nominal setpoints, creating a process sensitivity matrix, creating intelligent setpoints using an efficient optimization method and process data, and establishing recipes that select appropriate models and setpoints during run-time.Type: GrantFiled: December 29, 2003Date of Patent: September 5, 2006Assignee: Tokyo Electron LimitedInventors: Sanjeev Kaushal, Kenji Sugishima, Pradeep Pandey