Patents by Inventor Pradeep V S R PYDAH

Pradeep V S R PYDAH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10084307
    Abstract: The disclosure provides an over-current protection circuit. A signal generating block in the over-current protection circuit generates one or more input voltages, a summed voltage and an average voltage in response to one or more differential voltages. A control block generates one or more control signals in response to the one or more input voltages and the average voltage. An analog control loop block generates an initiation signal in response to the summed voltage and an output voltage. A phase control logic block generates one or more PWM (pulse width modulated) signals in response to the initiation signal and the one or more control signals.
    Type: Grant
    Filed: April 28, 2016
    Date of Patent: September 25, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Pradeep V S R Pydah, Biranchinath Sahu, Tetsuo Tateishi, Kuang-Yao Cheng, Nandakishore Raimar
  • Patent number: 9817414
    Abstract: Undershoot reduction circuitry includes, for example, a first comparator, a second comparator, and a controller. The first comparator is operable for comparing an indication of a power supply voltage output against a first threshold. The second comparator is operable for comparing an indication of the power supply voltage output against a second threshold. The controller is operable for generating a first power control signal to raise the power supply voltage output when the indication of the power supply voltage output has a first slope and crosses the first threshold and to lower the power supply voltage output when the indication of the power supply voltage output has an opposite slope and crosses the second threshold.
    Type: Grant
    Filed: April 13, 2015
    Date of Patent: November 14, 2017
    Assignee: Texas Instruments Incorporated
    Inventors: Naga Venkata Prasadu Mangina, Biranchinath Sahu, Pradeep V S R Pydah, Nandakishore Raimar
  • Publication number: 20170317488
    Abstract: The disclosure provides an over-current protection circuit. A signal generating block in the over-current protection circuit generates one or more input voltages, a summed voltage and an average voltage in response to one or more differential voltages. A control block generates one or more control signals in response to the one or more input voltages and the average voltage. An analog control loop block generates an initiation signal in response to the summed voltage and an output voltage. A phase control logic block generates one or more PWM (pulse width modulated) signals in response to the initiation signal and the one or more control signals.
    Type: Application
    Filed: April 28, 2016
    Publication date: November 2, 2017
    Inventors: Pradeep V S R PYDAH, Biranchinath SAHU, Tetsuo TATEISHI, Kuang-Yao CHENG, Nandakishore RAIMAR