Abstract: A system is provided. The system includes a utility, a plurality of uninterruptible power supplies (UPSs), a ring bus, at least one load electrically coupled to the plurality of UPSs and the ring bus, and a controller communicatively coupled to the plurality of UPSs, the controller configured to determine a common reference angle while the utility is disconnected from at least one UPS of the plurality of UPSs, calculate a phase angle for each UPS of the plurality of UPSs, wherein the phase angle for each UPS is calculated relative to the common reference angle, and control operation of each UPS based on the respective calculated phase angles.

Abstract: A system is provided. The system includes a plurality of uninterruptible power supplies (UPSs), a ring bus, at least one load electrically coupled to the plurality of UPSs and the ring bus, and a controller communicatively coupled to the plurality of UPSs. The controller is configured to calculate a phase angle for each UPS of the plurality of UPSs, wherein the phase angle is calculated relative to a common reference angle, and control operation of each UPS based on the respective calculated phase angles.

Abstract: A power conversion system including a power source configured to provide input power is disclosed. The power conversion system also includes a first power converter comprising switches configured to convert the input power to an intermediate converted power. The power conversion system further includes a controller configured to control the switches based on an asymmetrical voltage cancellation mode wherein the controller is configured to operate the first power converter at a fixed operating frequency, maintain a zero voltage switching mode and control a duty cycle of the switches. The power conversion system also includes a contactless power transfer system configured to transmit the intermediate converted power to a load wherein the load is coupled to a second power converter that converts the intermediate converted power to an output power wherein an output voltage of the output power is controlled by the controller based on the asymmetrical voltage cancellation mode.

Abstract: A medium voltage uninterruptible power supply system is presented. The system includes a first power converter coupled between a first bus and a second bus. Furthermore, a second power converter operatively coupled to the first power converter via the first bus and the second bus, where the second power converter includes at least three legs, where the at least three legs include a plurality of switching units, and where the plurality of switching units includes at least two semiconductor switches and an energy storage device. Additionally, system includes a direct current link coupled between the first bus and the second bus. Also, system includes an energy source coupled to the second power converter, the direct current link, or a combination thereof via one or more of a third power converter, a transformer, and a fourth power converter. Method of operating a medium voltage uninterruptible power supply system is also presented.

Abstract: A sub-sea power transmission/distribution network includes a plurality of standard proven power converter building blocks on each of the power source side and the sub-sea load side. The power source side converters and the sub-sea load side converters are each configured to provide a modular stacked dc (MSDC) converter architecture. The power source side converters are further configured to share the load equally or in proportion to their individual power ratings. The configurations are based on corresponding droop curves representative of MSDC link current magnitude data and average output voltage data of the power source side converters.

Abstract: A sub-sea power transmission/distribution network includes a plurality of standard proven power converter building blocks on each of the power source side and the sub-sea load side. The power source side converters and the sub-sea load side converters are each configured to provide a modular stacked dc (MSDC) converter architecture. The power source side converters are further configured to share the load equally or in proportion to their individual power ratings. The configurations are based on corresponding droop curves representative of MSDC link current magnitude data and average output voltage data of the power source side converters.

Abstract: A phase identification system includes a power distribution station comprising a phase distortion device to generate distortions at cross over points of at least two pairs of three phase voltages and a phase detection device to receive one of the three phase voltages and to identify a phase of the received voltage based on a characteristic of a distortion in the received voltage.

Abstract: A circuit interrupter for interrupting current on a line conductor is provided. The circuit interrupter includes separable contacts, a trip mechanism, a bimetal, a microprocessor, a series arc detection sequence, a low-pass filter circuit, and a high-pass filter circuit. The trip mechanism selectively opens the separable contacts when activated. The series arc detection sequence is resident on the microprocessor and includes a plurality of series fault detection algorithms. The low-pass filter circuit provides a low-pass signal to the series arc detection sequence. The high-pass filter circuit provides a high-pass signal to the series arc detection sequence. The sequence selects a particular algorithm from the plurality of algorithms based on the low-pass signal. The sequence calculates a plurality of statistical features from the high-pass signal and sends an output signal to activate the trip mechanism based on a comparison of the plurality of statistical features to the particular algorithm.

Abstract: A circuit interrupter for interrupting alternating current electrical signal on a line conductor of a circuit feeding a load, including: an electrical contact in operatively connected in series with the line conductor; a trip mechanism for selectively opening the electrical contact when activated; a current sensor connected in series with the line conductor for obtaining a sample alternating current electrical signal from the circuit feeding the load; a microprocessor in electrical communication with the trip mechanism and comprising a series arc fault detection program resident thereon; the series arc detection program comprising a discrete wavelet transform for determining the presence of a series arc fault current in the circuit feeding the load; wherein, when the discrete wavelet transform determines the presence of a series arc fault, the microprocessors signals the trip mechanism to activate and open the electrical contact in operatively connected in series with the line conductor.

Abstract: A method of detecting a series arc fault in an alternating current electrical signal is provided. A method for detecting a series arc fault in an alternating current electrical signal, comprising: a) calculating discrete wavelet coefficients using a current signal as an input for the discrete wavelet coefficient calculations, and outputting discrete wavelet coefficient filtered output; b) subsampling the discrete wavelet coefficient filtered output and outputting a subsampled output; c) calculating critical variables from the subsampled output; d) determining from the critical variables whether a series arc fault is present in the current signal; and e) outputting an signal indicating that a series arc fault is present in the current signal, if substantially all of the critical variables meet a predetermined criteria.

Abstract: A circuit interrupter for interrupting current on a line conductor is provided. The circuit interrupter includes separable contacts, a trip mechanism, a bimetal, a microprocessor, a series arc detection sequence, a low-pass filter circuit, and a high-pass filter circuit. The trip mechanism selectively opens the separable contacts when activated. The series arc detection sequence is resident on the microprocessor and includes a plurality of series fault detection algorithms. The low-pass filter circuit provides a low-pass signal to the series arc detection sequence. The high-pass filter circuit provides a high-pass signal to the series arc detection sequence. The sequence selects a particular algorithm from the plurality of algorithms based on the low-pass signal. The sequence calculates a plurality of statistical features from the high-pass signal and sends an output signal to activate the trip mechanism based on a comparison of the plurality of statistical features to the particular algorithm.

Abstract: A circuit interrupter for interrupting current on a line conductor is provided. The circuit interrupter includes separable contacts, a trip mechanism, a bimetal, a microprocessor, a series arc detection sequence, a low-pass filter circuit, and a high-pass filter circuit. The trip mechanism selectively opens the separable contacts when activated. The series arc detection sequence is resident on the microprocessor and includes a plurality of series fault detection algorithms. The low-pass filter circuit provides a low-pass signal to the series arc detection sequence. The high-pass filter circuit provides a high-pass signal to the series arc detection sequence. The sequence selects a particular algorithm from the plurality of algorithms based on the low-pass signal. The sequence calculates a plurality of statistical features from the high-pass signal and sends an output signal to activate the trip mechanism based on a comparison of the plurality of statistical features to the particular algorithm.

Abstract: An electronically controlled grade crossing gate system and method. The system includes a gate arm, a gate arm moving assembly, a position sensor assembly and a controller. The gate arm moving assembly is configured to move the gate arm and the position sensor assembly is configured to sense a position of the gate arm. The position sensor assembly is a non-contact position sensor assembly. The controller is coupled to the gate arm moving assembly and the position sensor assembly and it is configured to receive an incoming command related to the gate arm. The controller activates the gate arm moving assembly in response to the incoming command and communicates with the position sensor assembly to monitor the position of the gate arm.

Abstract: An electronically controlled grade crossing gate system and method. The system includes a gate arm, a gate arm moving assembly, a position sensor assembly and a controller. The gate arm moving assembly is configured to move the gate arm and the position sensor assembly is configured to sense a position of the gate arm. The position sensor assembly is a non-contact position sensor assembly. The controller is coupled to the gate arm moving assembly and the position sensor assembly and it is configured to receive an incoming command related to the gate arm. The controller activates the gate arm moving assembly in response to the incoming command and communicates with the position sensor assembly to monitor the position of the gate arm.

Abstract: A method for driving a DC motor includes generating a first voltage pulse, based on a pre-determined speed input and duty cycle, and configured to generate motor current of reference current value sufficient to achieve a desired speed according to the speed input. Subsequent pulses of the voltage are generated to maintain the current substantially within a range of the reference current. Another method includes sensing and comparing motor current to reference current value and generating an error signal therebetween, which is integrated over time to generate an integrated current error, which is compared with a reference pulse. Thereafter generating applied voltage pulses configured to: switch at each instance of the integrated current error exceeding or becoming less than the reference pulse value; generate a motor current sufficient to achieve a desired speed according to a pre-determined speed input; and having substantially zero average variation from the reference current.

Abstract: An electronically controlled grade crossing gate system and method. The system includes a gate arm, a gate arm moving assembly, a position sensor assembly and a controller. The gate arm moving assembly is configured to move the gate arm and the position sensor assembly is configured to sense a position of the gate arm. The position sensor assembly is a non-contact position sensor assembly. The controller is coupled to the gate arm moving assembly and the position sensor assembly and it is configured to receive an incoming command related to the gate arm. The controller activates the gate arm moving assembly in response to the incoming command and communicates with the position sensor assembly to monitor the position of the gate arm.

Abstract: A method for driving a DC motor includes generating a first voltage pulse, based on a pre-determined speed input and duty cycle, and configured to generate motor current of reference current value sufficient to achieve a desired speed according to the speed input. Subsequent pulses of the voltage are generated to maintain the current substantially within a range of the reference current. Another method includes sensing and comparing motor current to reference current value and generating an error signal therebetween, which is integrated over time to generate an integrated current error, which is compared with a reference pulse. Thereafter generating applied voltage pulses configured to: switch at each instance of the integrated current error exceeding or becoming less than the reference pulse value; generate a motor current sufficient to achieve a desired speed according to a pre-determined speed input; and having substantially zero average variation from the reference current.

Abstract: A method for reducing negative torque in a brushless single phase DC motor, the method includes initiating the motor in a normal mode of operation and activating an ON time control to cut off a voltage supply to the motor. The ON time control is applied after a predetermined time delay, the delay being defined by the motor parameters.