Patents by Inventor Pradeepsunder Ganesh

Pradeepsunder Ganesh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230144316
    Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to improve computing resource utilization. An example apparatus includes an application specific sensor (AS) to monitor a workload of a platform, the workload executing on at least one general purpose central processing unit (CPU) of the platform, and a dynamic deployment module (DDM) to: in response to a workload performance threshold being satisfied, identify a bit stream capable of configuring a field programmable gate array (FPGA) to execute the workload, and configure the FPGA via the bit stream to execute at least a portion of the workload.
    Type: Application
    Filed: December 30, 2022
    Publication date: May 11, 2023
    Inventors: Stephen Thomas Palermo, Dwarkadisha D. Kamhout, Pradeepsunder Ganesh, Prabhat K. Gupta
  • Publication number: 20210144081
    Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to improve computing resource utilization. An example apparatus includes an application specific sensor (AS) to monitor a workload of a platform, the workload executing on at least one general purpose central processing unit (CPU) of the platform, and a dynamic deployment module (DDM) to: in response to a workload performance threshold being satisfied, identify a bit stream capable of configuring a field programmable gate array (FPGA) to execute the workload, and configure the FPGA via the bit stream to execute at least a portion of the workload.
    Type: Application
    Filed: September 10, 2020
    Publication date: May 13, 2021
    Inventors: Stephen Thomas Palermo, Dwarkadisha D. Kamhout, Pradeepsunder Ganesh, Prabhat K. Gupta
  • Patent number: 10936449
    Abstract: Discussed herein are component redundancy systems, devices, and methods. A method to transfer a workload from a first component to a second component of a same device may include monitoring a wear indicator associated with the first component, and in response to an indication that the first component is stressed based on the wear indicator, transferring a workload of the first component to the second component.
    Type: Grant
    Filed: March 21, 2017
    Date of Patent: March 2, 2021
    Assignee: Intel Corporation
    Inventors: Hang T. Nguyen, Stephen T. Palermo, John J. Browne, Chris MacNamara, Pradeepsunder Ganesh
  • Patent number: 10778558
    Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to improve computing resource utilization. An example apparatus includes an application specific sensor (AS) to monitor a workload of a platform, the workload executing on at least one general purpose central processing unit (CPU) of the platform, and a dynamic deployment module (DDM) to: in response to a workload performance threshold being satisfied, identify a bit stream capable of configuring a field programmable gate array (FPGA) to execute the workload, and configure the FPGA via the bit stream to execute at least a portion of the workload.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: September 15, 2020
    Assignee: Intel Corporation
    Inventors: Stephen Thomas Palermo, Dwarkadisha D. Kamhout, Pradeepsunder Ganesh, Prabhat K. Gupta
  • Patent number: 10127072
    Abstract: The present disclosure is directed to enhanced virtual function capabilities in a virtualized network environment. In general, devices may comprise physical and virtualized resources. The physical resources may comprise at least a network adaptor that may handle incoming data from a network and outgoing data to the network. The virtualized resources may comprise at least one virtual machine (VM) and a corresponding interface. The corresponding interface may be one of a physical interface, a virtual interface or a “super” virtual interface. The physical interface may provide a first set of capabilities allowing the VM to access (e.g., control) at least the network adaptor. The virtual interface may provide a second set of capabilities that is a subset of the first set. The super virtual interface may provide a third set of capabilities including the second set of capabilities and at least one additional capability from the first set of capabilities.
    Type: Grant
    Filed: January 18, 2018
    Date of Patent: November 13, 2018
    Assignee: Intel Corporation
    Inventors: Stephen T. Palermo, Scott P. Dubal, Trevor Cooper, Anjali S. Jain, Iosif Gasparakis, Jr-Shian Tsai, Mike Bursell, Pradeepsunder Ganesh, Parthasarathy Sarangam, Jesse C. Brandeburg
  • Publication number: 20180275893
    Abstract: Discussed herein are component redundancy systems, devices, and methods. A method to transfer a workload from a first component to a second component of a same device may include monitoring a wear indicator associated with the first component, and in response to an indication that the first component is stressed based on the wear indicator, transferring a workload of the first component to the second component.
    Type: Application
    Filed: March 21, 2017
    Publication date: September 27, 2018
    Inventors: Hang T. Nguyen, Stephen T. Palermo, John J. Browne, Chris MacNamara, Pradeepsunder Ganesh
  • Patent number: 10048977
    Abstract: Methods and Apparatus for Multi-Stage VM Virtual Network Function and Virtual Service Function Chain Acceleration for NFV and needs-based hardware acceleration. Compute platform hosting virtualized environments including virtual machines (VMs) running service applications performing network function virtualization (NFV) employ Field Programmable Gate Array (FPGA) to provide a hardware-based fast path for performing VM-to-VM and NFV-to-NFV transfers. The FPGAs, along with associated configuration data are also configured to support dynamic assignment and performance of hardware-acceleration to offload processing tasks from processors in virtualized environments, such as cloud data centers and the like.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: August 14, 2018
    Assignee: Intel Corporation
    Inventors: Stephen T. Palermo, Thomas E. Willis, Kapil Sood, Ilango S. Ganga, Scott P. Dubal, Pradeepsunder Ganesh, Jesse C. Brandeburg
  • Publication number: 20180095802
    Abstract: In one embodiment, a method comprises determining, at a plurality of instances in time, a value of at least one stress characteristic of a hardware resource; determining an accumulated stress value of the hardware resource, the accumulated stress value comprising the sum of a plurality of incremental stress values, an incremental stress value determined based on the value of the at least one stress characteristic at a particular instance in time; and generating a first stress indicator in response to a determination that the accumulated stress value of the hardware resource is greater than a first threshold stress value associated with the hardware resource.
    Type: Application
    Filed: September 30, 2016
    Publication date: April 5, 2018
    Applicant: Intel Corporation
    Inventors: Hang T. Nguyen, Gordon McFadden, Pradeepsunder Ganesh, Stephen Thomas Palermo, Travis J. White, Ashok Raj, Vivek Garg, Dhruv Singh
  • Patent number: 9910692
    Abstract: The present disclosure is directed to enhanced virtual function capabilities in a virtualized network environment. In general, devices may comprise physical and virtualized resources. The physical resources may comprise at least a network adaptor that may handle incoming data from a network and outgoing data to the network. The virtualized resources may comprise at least one virtual machine (VM) and a corresponding interface. The corresponding interface may be one of a physical interface, a virtual interface or a “super” virtual interface. The physical interface may provide a first set of capabilities allowing the VM to access (e.g., control) at least the network adaptor. The virtual interface may provide a second set of capabilities that is a subset of the first set. The super virtual interface may provide a third set of capabilities including the second set of capabilities and at least one additional capability from the first set of capabilities.
    Type: Grant
    Filed: January 26, 2016
    Date of Patent: March 6, 2018
    Assignee: Intel Corporation
    Inventors: Stephen T. Palermo, Scott P. Dubal, Trevor Cooper, Anjali S. Jain, Iosif Gasparakis, Jr-Shian Tsai, Mike Bursell, Pradeepsunder Ganesh, Parthasarathy Sangam, Jesse C. Brandeburg
  • Publication number: 20170264680
    Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to improve computing resource utilization. An example apparatus includes an application specific sensor (AS) to monitor a workload of a platform, the workload executing on at least one general purpose central processing unit (CPU) of the platform, and a dynamic deployment module (DDM) to: in response to a workload performance threshold being satisfied, identify a bit stream capable of configuring a field programmable gate array (FPGA) to execute the workload, and configure the FPGA via the bit stream to execute at least a portion of the workload.
    Type: Application
    Filed: March 31, 2016
    Publication date: September 14, 2017
    Inventors: Stephen Thomas Palermo, Dwarkadisha D. Kamhout, Pradeepsunder Ganesh, Prabhat K. Gupta
  • Publication number: 20170177396
    Abstract: Methods and Apparatus for Multi-Stage VM Virtual Network Function and Virtual Service Function Chain Acceleration for NFV and needs-based hardware acceleration. Compute platform hosting virtualized environments including virtual machines (VMs) running service applications performing network function virtualization (NFV) employ Field Programmable Gate Array (FPGA) to provide a hardware-based fast path for performing VM-to-VM and NFV-to-NFV transfers. The FPGAs, along with associated configuration data are also configured to support dynamic assignment and performance of hardware-acceleration to offload processing tasks from processors in virtualized environments, such as cloud data centers and the like.
    Type: Application
    Filed: December 22, 2015
    Publication date: June 22, 2017
    Inventors: Stephen T. Palermo, Thomas E. Willis, Kapil Sood, Ilango S. Ganga, Scott P. Dubal, Pradeepsunder Ganesh, Jesse C. Brandenburg
  • Publication number: 20160378628
    Abstract: Hardware processors and methods to perform self-monitoring diagnostics to predict and detect failure are described. In one embodiment, a hardware processor includes a plurality of cores, and a diagnostic hardware unit to isolate a core of the plurality of cores at run-time, perform a stress test on an isolated core, determine a stress factor from a result of the stress test, and store the stress factor in a data storage device.
    Type: Application
    Filed: June 26, 2015
    Publication date: December 29, 2016
    Inventors: Hang T. Nguyen, Gordon McFadden, Travis J. White, Scott P. Bobholz, Edwin Verplanke, Steven C. Franks, Vivek Garg, Ashok Raj, Guy G. Sotomayor, Jose A. Vargas, Pradeepsunder Ganesh, Stephen T. Palermo
  • Publication number: 20110142067
    Abstract: A method and system for dynamic credit sharing in a quick path interconnect link. The method including dividing incoming credit into a first credit pool and a second credit pool; and allocating the first credit pool for a first data traffic queue and allocating the second credit pool for a second data traffic queue in a manner so as to preferentially transmit the first data traffic queue or the second data traffic queue through a link.
    Type: Application
    Filed: December 16, 2009
    Publication date: June 16, 2011
    Inventors: Timothy J. JEHL, Pradeepsunder Ganesh, Aimee Wood, Robert Safranek, John A. Miller, Selim Bilgin, Osama Neiroukh