Patents by Inventor Pradhuman S. Zaveri

Pradhuman S. Zaveri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5995396
    Abstract: A hybrid standby power system for producing regulated DC electrical power, a method of producing such power and a telecommunications installation that employs either the system or the method. In one embodiment, the system includes: (1) a primary power input, couplable to a primary power source, that accepts primary electrical power subject to interruption, (2) a standby power input, couplable to a standby power source, that accepts unregulated standby electrical power and (3) a power converter, couplable to at least one of the primary and standby power inputs, including a rectifier that rectifies at least one of the primary and standby electrical power to provide unregulated DC electrical power and a DC--DC converter that converts the unregulated DC electrical power into the regulated DC electrical power.
    Type: Grant
    Filed: March 15, 1999
    Date of Patent: November 30, 1999
    Assignee: Lucent Technologies Inc.
    Inventors: Vincent M. Byrne, Marco A. Davila, Edward C. Fontana, Yehoshua Mandelcorn, Steven C. Stein, Pradhuman S. Zaveri
  • Patent number: 5461302
    Abstract: A switching boost type voltage regulator includes a resonant snubber network connected in parallel with its FET power switch. The snubber includes a FET auxiliary switch that is connected and turned on in order to reduce the voltage across the FET power switch to a zero level at its turn-on transition. A driver circuit, driven by a voltage regulating pulse width modulation (PWM) pulse, initially turns on the FET auxiliary switch to reduce a voltage across the FET power switch and then turns on the FET power switch when the voltage across drops below a threshold level. The FET auxiliary switch is turned off when the FET power switch is turned on. A latch circuit insures the complimentary states of these two switches. The snubber circuit is disabled a near to zero voltage regardless of line and load levels and hence the power dissipation in the snubber is significantly reduced.
    Type: Grant
    Filed: November 30, 1993
    Date of Patent: October 24, 1995
    Assignee: AT&T Corp.
    Inventors: Richard R. Garcia, Pradhuman S. Zaveri
  • Patent number: 4849874
    Abstract: A power converter embodying the principles of the invention, and having a positive and negative output utilizes a single magnetic amplifier controller to control two saturable inductor cores utilized to regulate the positive and negative outputs by modulating the positive and negative pulse output of the power converter transformer. The magnetic amplifier controller monitors and sums the two voltage outputs and derives an offset from average representative output signal. This offset from average representative output signal is compared with a reference signal to derive an error signal. A current responsive to the error signal is generated and utilized to periodically reset the two saturable inductor cores and regulate the positive and negative output voltages.
    Type: Grant
    Filed: October 24, 1988
    Date of Patent: July 18, 1989
    Assignee: American Telephone and Telegraph Company, AT&T Bell Laboratories
    Inventors: Robert J. Buck, Ralph Walk, Pradhuman S. Zaveri