Patents by Inventor Pradip D. Patei

Pradip D. Patei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6777803
    Abstract: An improvement to an integrated circuit package substrate of the type that has a bonding ring with an exposed upper surface, where a first portion of the exposed upper surface is for receiving a molding compound and a second portion of the exposed upper surface is for receiving an electrical connection. A solder mask is formed on the first portion of the exposed upper surface of the bonding ring.
    Type: Grant
    Filed: August 28, 2002
    Date of Patent: August 17, 2004
    Assignee: LSI Logic Corporation
    Inventors: Maurice Othieno, Aritharan Thurairajaratnam, Manickam Thavarajah, Pradip D. Patei, Severino A. Legaspi, Jr.