Abstract: A system and method include receiving, by a security controller of a system-on-chip and from a controller of the system-on-chip, an indication that a debugger computing device is connected to a debug port of the system-on-chip. A user debug authorization key and a user debug profile are received and verified by the security controller. The user debug profile identifies a set of requested resources. A configuration of the system-on-chip is modified to allow the debugger computing device to access resources of the set of requested resources.

Abstract: A system and method for protecting access to resources of an SoC among multiple owners. The SoC includes multiple master devices, each configured to conduct transactions with addressed ones of multiple slave devices via an interconnect, multiple access devices coupled to the interconnect and programmed to control access to each slave device, a secure memory that stores a hash value of a partitioning contract incorporating a list of resources available to each of the owners, and a security engine. The security engine is configured to allow installation and execution of code provided by each of the owners only when the code is authenticated by the stored partitioning contract hash value. The security engine is also configured to program the access devices according to the partitioning contract. An encrypted cohort owner tag may be stored for each owner and used to generate cohort authentication tags used to authenticate cohort definitions.

Abstract: A device is disclosed. The device includes a read-only memory (ROM), a random key generator, a lifecycle controller, an access port and a processor. The processor is configured, based on a lifecycle status, to cause the random key generator to generate a secret key and store the secret key in the ROM. The lifecycle controller is configured to disable an external access via the access port until the secret key is stored in the ROM.

Abstract: A system for securing a real-time clock (RTC) of an electronic device includes a RTC counter that counts clock pulses of a RTC signal generated by a crystal oscillator, and a reference-time register that periodically stores a reference time value generated by a network-clock generator. A hash-value generator uses a predefined hash algorithm to generate first and second hash values based on the reference time value and the count of the RTC counter, respectively, at predetermined time intervals. A comparator compares the first and second hash values and generates a trigger signal when there is a mismatch.