Patents by Inventor Pradosh Tapan Datta

Pradosh Tapan Datta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220263866
    Abstract: Methods, systems, and computer readable media for testing a system under test (SUT). A method includes sending a first test packet to the SUT over a communication link. The first test packet is associated with a layer 2 secure channel that is bound to an emulated network device. The method includes receiving a second test packet from the SUT over the communication link. The second test packet includes an unencrypted portion and an encrypted portion. The method includes forming a test identifier that uniquely identifies the layer 2 secure channel and the emulated network device using a subset of bits from a secure channel identifier in the unencrypted portion of the second test packet. The method includes decrypting the encrypted portion of the second test packet by finding a security key using the test identifier.
    Type: Application
    Filed: February 12, 2021
    Publication date: August 18, 2022
    Inventors: Debojyoti Roy, Pradosh Tapan Datta, Robert Brian Luking, Aymen Chebab
  • Patent number: 11108675
    Abstract: Methods, systems, and computer readable media for testing effects of simulated frame preemption and deterministic fragmentation of preemptable frames in a frame-preemption-capable network are disclosed. According to one method, a device under test including at least one processor simulates frame preemption by generating a plurality of simulated preempted frame fragments and an express frame. The test device deterministically orders, independently from MAC merge sublayer fragmentation and ordering, the simulated preempted frame fragments and the express frame for transmission to the DUT. The test device transmits the simulated preempted frame fragments and the express frame to the DUT in an order corresponding to the deterministic ordering. The test device receives a response of the DUT to the simulated preempted frame fragments and the express frame. The test device determines, based on the response of the DUT, whether the DUT operates in accordance with specifications for frame preemption.
    Type: Grant
    Filed: October 31, 2018
    Date of Patent: August 31, 2021
    Assignee: Keysight Technologies, Inc.
    Inventors: Pradosh Tapan Datta, Tanuman Bhaduri, Kingshuk Mandal, Alon Regev, James Robert Bauder
  • Patent number: 10728134
    Abstract: Methods, systems, and computer readable media for measuring preempted frame delivery latency in a frame-preemption-capable network are disclosed. One method includes, in a network test tool including at least one processor, simulating frame preemption by generating a plurality of simulated preempted frame fragments of a simulated preempted frame and an express frame. The method further includes inserting a last fragment generation timestamp in a last fragment of the simulated preempted frame fragments, wherein inserting the last fragment generation timestamp in a last fragment of the simulated preempted frame fragments includes inserting the last fragment generation timestamp in a portion of the last fragment that will remain in a last fragment of a refragmentation of the simulated preempted frame in the event that the simulated preempted frame is reassembled and refragmented. The method further includes transmitting the simulated preempted frame fragments and the express frame to a device under test (DUT).
    Type: Grant
    Filed: November 14, 2018
    Date of Patent: July 28, 2020
    Assignee: KEYSIGHT TECHNOLOGIES, INC.
    Inventors: Pradosh Tapan Datta, Tanuman Bhaduri, Kingshuk Mandal
  • Publication number: 20200153722
    Abstract: Methods, systems, and computer readable media for measuring preempted frame delivery latency in a frame-preemption-capable network are disclosed. One method includes, in a network test tool including at least one processor, simulating frame preemption by generating a plurality of simulated preempted frame fragments of a simulated preempted frame and an express frame. The method further includes inserting a last fragment generation timestamp in a last fragment of the simulated preempted frame fragments, wherein inserting the last fragment generation timestamp in a last fragment of the simulated preempted frame fragments includes inserting the last fragment generation timestamp in a portion of the last fragment that will remain in a last fragment of a refragmentation of the simulated preempted frame in the event that the simulated preempted frame is reassembled and refragmented. The method further includes transmitting the simulated preempted frame fragments and the express frame to a device under test (DUT).
    Type: Application
    Filed: November 14, 2018
    Publication date: May 14, 2020
    Inventors: Pradosh Tapan Datta, Tanuman Bhaduri, Kingshuk Mandal
  • Publication number: 20200136953
    Abstract: Methods, systems, and computer readable media for testing effects of simulated frame preemption and deterministic fragmentation of preemptable frames in a frame-preemption-capable network are disclosed. According to one method, a device under test including at least one processor simulates frame preemption by generating a plurality of simulated preempted frame fragments and an express frame. The test device deterministically orders, independently from MAC merge sublayer fragmentation and ordering, the simulated preempted frame fragments and the express frame for transmission to the DUT. The test device transmits the simulated preempted frame fragments and the express frame to the DUT in an order corresponding to the deterministic ordering. The test device receives a response of the DUT to the simulated preempted frame fragments and the express frame. The test device determines, based on the response of the DUT, whether the DUT operates in accordance with specifications for frame preemption.
    Type: Application
    Filed: October 31, 2018
    Publication date: April 30, 2020
    Inventors: Pradosh Tapan Datta, Tanuman Bhaduri, Kingshuk Mandal, Alon Regev, James Robert Bauder