Patents by Inventor Pradyumna Kumar Swain
Pradyumna Kumar Swain has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7932575Abstract: A method for fabricating a back-illuminated semiconductor imaging device on a semiconductor-on-insulator substrate, and resulting imaging device is disclosed. The method for manufacturing the imaging device includes the steps of providing a substrate comprising an insulator layer, and an epitaxial layer substantially overlying the insulator layer; fabricating at least one imaging component at least partially overlying and extending into the epitaxial layer; forming a plurality of bond pads substantially overlying the epitaxial layer; fabricating a dielectric layer substantially overlying the epitaxial layer and the at least one imaging component; providing a handle wafer; forming a plurality of conductive trenches in the handle wafer; forming a plurality of conductive bumps on a first surface of the handle wafer substantially underlying the conductive trenches; and bonding the plurality of conductive bumps to the plurality of bond pads.Type: GrantFiled: April 28, 2009Date of Patent: April 26, 2011Assignee: SRI InternationalInventors: Mahalingam Bhaskaran, Pradyumna Kumar Swain, Peter Levine, Norman Goldsmith
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Patent number: 7855128Abstract: A method for fabricating a back-illuminated semiconductor imaging device on an ultra-thin semiconductor-on-insulator substrate (UTSOI) is disclosed. The UTSOI substrate is formed by providing a handle wafer comprising a mechanical substrate and an insulator layer substantially overlying the mechanical substrate. A donor wafer is provided. Hydrogen is implanted in the donor wafer to form a bubble layer. The donor wafer is doped with at least one dopant to form a doped layer proximal to the bubble layer. The handle wafer and the donor wafer are bonded between the insulator layer of the handle wafer and a surface of the donor wafer proximal to the doped layer to form a combined wafer having a portion substantially underlying the bubble layer. The portion of the combined wafer substantially underlying the bubble layer is removed so as to expose a seed layer. An epitaxial layer is grown substantially overlying the seed layer, wherein at least one dopant diffuse into the epitaxial layer.Type: GrantFiled: May 27, 2009Date of Patent: December 21, 2010Assignee: Sarnoff CorporationInventors: Rui Zhu, Peter Alan Levine, Pradyumna Kumar Swain, Mahalingam Bhaskaran
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Patent number: 7804113Abstract: An anti-blooming structure for a back-illuminated imager is disclosed. In one embodiment, the anti-blooming structure is formed in a substrate of a first conductivity type having a back side and a front side, comprising a channel region of a second conductivity type formed in the substrate; a barrier region of the first conductivity type positioned in the substrate substantially overlying the channel region and proximal to the front side of the substrate; and a drain region of the second conductivity type positioned substantially overlying the barrier region, wherein when light impinges on the back side of the substrate the light generates charge carriers that collect in the channel region, the charge carriers passing through the barrier region into the drain region when a potential corresponding to the collected charge carriers in the channel region is about equal to the potential corresponding to the barrier region.Type: GrantFiled: September 5, 2007Date of Patent: September 28, 2010Assignee: Sarnoff CorporationInventors: Pradyumna Kumar Swain, Mahalingam Bhaskaran
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Patent number: 7777229Abstract: A method for fabricating a back-illuminated semiconductor imaging device and resulting imaging device is disclosed, which includes the steps providing a substrate having a front surface and a back surface; growing an epitaxial layer substantially overlying the front surface of the substrate; forming at least one barrier layer substantially within the epitaxial layer; fabricating at least one imaging structure overlying and extending into the epitaxial layer, the imaging structure at least one charge transfer region, the at least one barrier layer substantially underlying the at least one charge transfer region, wherein light incident on the back surface of the substrate generates charge carriers which are diverted away from the at least one charge transfer region by the at least one barrier layer. At least a portion of the epitaxial layer is grown using an epitaxial lateral overgrowth technique.Type: GrantFiled: August 24, 2007Date of Patent: August 17, 2010Assignee: Sarnoff CorporationInventors: Pradyumna Kumar Swain, Mahalingam Bhaskaran, Peter Levine, Norman Goldsmith
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Publication number: 20100032783Abstract: A method for fabricating a back-illuminated semiconductor imaging device on a semiconductor-on-insulator substrate, and resulting imaging device is disclosed.Type: ApplicationFiled: October 15, 2009Publication date: February 11, 2010Inventors: Pradyumna Kumar Swain, Mahalingam Bhaskaran, Peter Alan Pal Levine
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Publication number: 20090298260Abstract: A method for fabricating a back-illuminated semiconductor imaging device on an ultra-thin semiconductor-on-insulator substrate (UTSOI) is disclosed. The UTSOI substrate is formed by providing a handle wafer comprising a mechanical substrate and an insulator layer substantially overlying the mechanical substrate. A donor wafer is provided. Hydrogen is implanted in the donor wafer to form a bubble layer. The donor wafer is doped with at least one dopant to form a doped layer proximal to the bubble layer. The handle wafer and the donor wafer are bonded between the insulator layer of the handle wafer and a surface of the donor wafer proximal to the doped layer to form a combined wafer having a portion substantially underlying the bubble layer. The portion of the combined wafer substantially underlying the bubble layer is removed so as to expose a seed layer. An epitaxial layer is grown substantially overlying the seed layer, wherein at least one dopant diffuse into the epitaxial layer.Type: ApplicationFiled: May 27, 2009Publication date: December 3, 2009Inventors: Rui Zhu, Peter Alan Levine, Pradyumna Kumar Swain, Mahalingam Bhaskaran
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Publication number: 20090294883Abstract: A method for fabricating a back-illuminated imager which has a pinned back surface is disclosed. A first insulator layer is formed overlying a mechanical substrate. A conductive layer is deposited overlying the first insulator layer. A second insulator layer is formed overlying the conductive layer to form a first structure, an interface being formed between the conductive layer and the second insulator layer, the conductive layer causing band bending proximal to the interface such that the interface is electrically pinned. Hydrogen is implanted in a separate device wafer to form a bubble layer. A final insulator layer is formed overlying the device wafer to form a second structure. The first structure and the second structure are bonded to form a combined wafer. A portion of the combined wafer is removed underlying the bubble layer to expose a seed layer comprising the semiconductor material substantially overlying the second insulator layer.Type: ApplicationFiled: May 15, 2009Publication date: December 3, 2009Inventors: Pradyumna Kumar Swain, David Jay Cheskis, Mahalingam Bhaskaran
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Patent number: 7622342Abstract: A method for fabricating a back-illuminated semiconductor imaging device on a semiconductor-on-insulator substrate, and resulting imaging device is disclosed. A substrate which includes an insulator layer and an epitaxial layer substantially overlying the insulator layer is provided. At least one bond pad region is formed extending into the epitaxial layer to a surface of the insulator layer. At least one bond pad is fabricated at least partially overlying the at least one bond pad region. At least one imaging component is fabricated at least partially overlying and extending into the epitaxial layer. A passivation layer is fabricated substantially overlying the epitaxial layer, the at least one bond pad, and the at least one imaging component. A handle wafer is bonded to the passivation layer. The at least a portion of the insulator layer and at least a portion of the bond pad region is etched to expose at least a portion of the at least one bond pad.Type: GrantFiled: January 28, 2008Date of Patent: November 24, 2009Assignee: Sarnoff CorporationInventors: Pradyumna Kumar Swain, Mahalingam Bhaskaran, Peter Levine
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Publication number: 20090256227Abstract: A method for fabricating a back-illuminated semiconductor imaging device on a semiconductor-on-insulator substrate, and resulting imaging device is disclosed. The method for manufacturing the imaging device includes the steps of providing a substrate comprising an insulator layer, and an epitaxial layer substantially overlying the insulator layer; fabricating at least one imaging component at least partially overlying and extending into the epitaxial layer; forming a plurality of bond pads substantially overlying the epitaxial layer; fabricating a dielectric layer substantially overlying the epitaxial layer and the at least one imaging component; providing a handle wafer; forming a plurality of conductive trenches in the handle wafer; forming a plurality of conductive bumps on a first surface of the handle wafer substantially underlying the conductive trenches; and bonding the plurality of conductive bumps to the plurality of bond pads.Type: ApplicationFiled: April 28, 2009Publication date: October 15, 2009Inventors: Mahalingam Bhaskaran, Pradyumna Kumar Swain, Peter Levine, Norman Goldsmith
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Publication number: 20090206377Abstract: A method and resulting device for reducing crosstalk in a back-illuminated imager is disclosed, comprising providing a substrate comprising an insulator layer and a seed layer substantially overlying the insulator layer, an interface being formed where the seed layer comes in contact with the insulator layer; forming an epitaxial layer substantially overlying the seed layer, the epitaxial layer defining plurality of pixel regions, each pixel region outlining a collection well for collecting charge carriers; and forming one of an electrical, optical, and electrical and optical barrier about the outlined collection well extending into the epitaxial layer to the interface between the seed layer and the insulator layer.Type: ApplicationFiled: June 4, 2008Publication date: August 20, 2009Inventors: Pradyumna Kumar Swain, Mahalingam Bhaskaran
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Patent number: 7547622Abstract: A method for fabricating CCD imaging structures is disclosed, comprising the steps of providing a silicon substrate; growing a dielectric layer substantially overlying the silicon substrate; depositing a first layer of polysilicon substantially overlaying the dielectric layer; removing at least a portion of the first layer of polysilicon to form a plurality of polysilicon gates and first predetermined inter-gate gaps, each of plurality of the polysilicon gates having a predetermined line width; depositing a second layer of polysilicon of a predetermined thickness substantially overlaying the plurality of polysilicon gates and the first predetermined inter-gate gaps; removing at least a portion of the second layer of polysilicon from between gates of the plurality of polysilicon gates to define a plurality of non-overlapping polysilicon gates and second predetermined inter-gate gaps that expose the dielectric layer, the second predetermined inter-gate gaps being smaller than the first predetermined inter-gateType: GrantFiled: October 4, 2007Date of Patent: June 16, 2009Assignee: Sarnoff CorporationInventors: Pradyumna Kumar Swain, David Arthur Furst, Mahalingam Bhaskaran
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Patent number: 7541256Abstract: A method for fabricating a back-illuminated semiconductor imaging device on a semiconductor-on-insulator substrate, and resulting imaging device is disclosed. The method for manufacturing the imaging device includes the steps of providing a substrate comprising an insulator layer, and an epitaxial layer substantially overlying the insulator layer; fabricating at least one imaging component at least partially overlying and extending into the epitaxial layer; forming a plurality of bond pads substantially overlying the epitaxial layer; fabricating a dielectric layer substantially overlying the epitaxial layer and the at least one imaging component; providing a handle wafer; forming a plurality of conductive trenches in the handle wafer; forming a plurality of conductive bumps on a first surface of the handle wafer substantially underlying the conductive trenches; and bonding the plurality of conductive bumps to the plurality of bond pads.Type: GrantFiled: July 18, 2007Date of Patent: June 2, 2009Assignee: Sarnoff CorporationInventors: Pradyumna Kumar Swain, Peter Levine, Mahalingam Bhaskaran, Norman Goldsmith
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Publication number: 20080237762Abstract: A method for fabricating a back-illuminated semiconductor imaging device on a semiconductor-on-insulator substrate, and resulting imaging device is disclosed. The method for manufacturing the imaging device includes the steps of providing a substrate comprising an insulator layer, and an epitaxial layer substantially overlying the insulator layer; fabricating at least one imaging component at least partially overlying and extending into the epitaxial layer; forming a plurality of bond pads substantially overlying the epitaxial layer; fabricating a dielectric layer substantially overlying the epitaxial layer and the at least one imaging component; providing a handle wafer; forming a plurality of conductive trenches in the handle wafer; forming a plurality of conductive bumps on a first surface of the handle wafer substantially underlying the conductive trenches; and bonding the plurality of conductive bumps to the plurality of bond pads.Type: ApplicationFiled: July 18, 2007Publication date: October 2, 2008Inventors: Pradyumna Kumar Swain, Peter Levine, Mahalingam Bhaskaran, Norman Goldsmith
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Publication number: 20080237668Abstract: A method for fabricating a back-illuminated semiconductor imaging device on a semiconductor-on-insulator substrate, and resulting imaging device is disclosed.Type: ApplicationFiled: January 28, 2008Publication date: October 2, 2008Inventors: Pradyumna Kumar Swain, Mahalingam Bhaskaran, Peter Alan Pal Levine
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Publication number: 20080096373Abstract: A method for fabricating CCD imaging structures having single layer polysilicon gates and employing conventional photolithographic techniques and equipment is disclosed.Type: ApplicationFiled: October 4, 2007Publication date: April 24, 2008Inventors: Pradyumna Kumar Swain, David Arthur Furst, Mahalingam Bhaskaran
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Publication number: 20080079032Abstract: An anti-blooming structure for a back-illuminated imager is disclosed. In one embodiment, the anti-blooming structure is formed in a substrate of a first conductivity type having a back side and a front side, comprising a channel region of a second conductivity type formed in the substrate; a barrier region of the first conductivity type positioned in the substrate substantially overlying the channel region and proximal to the front side of the substrate; and a drain region of the second conductivity type positioned substantially overlying the barrier region, wherein when light impinges on the back side of the substrate the light generates charge carriers that collect in the channel region, the charge carriers passing through the barrier region into the drain region when a potential corresponding to the collected charge carriers in the channel region is about equal to the potential corresponding to the barrier region.Type: ApplicationFiled: September 5, 2007Publication date: April 3, 2008Inventors: Pradyumna Kumar Swain, Mahalingam Bhaskaran
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Publication number: 20080061390Abstract: A method for fabricating a back-illuminated semiconductor imaging device and resulting imaging device is disclosed, which includes the steps providing a substrate having a front surface and a back surface; growing an epitaxial layer substantially overlying the front surface of the substrate; forming at least one barrier layer substantially within the epitaxial layer; fabricating at least one imaging structure overlying and extending into the epitaxial layer, the imaging structure at least one charge transfer region, the at least one barrier layer substantially underlying the at least one charge transfer region, wherein light incident on the back surface of the substrate generates charge carriers which are diverted away from the at least one charge transfer region by the at least one barrier layer. At least a portion of the epitaxial layer is grown using an epitaxial lateral overgrowth technique.Type: ApplicationFiled: August 24, 2007Publication date: March 13, 2008Inventors: Pradyumna Kumar Swain, Bhaskaran Mahalingam, Peter Levine, Norman Goldsmith
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Patent number: 7265397Abstract: An optical sensor circuit for generating signals corresponding to received photoelectrons is formed on a single monolithic substrate and includes a charge coupled device (CCD) array. The array is formed of a plurality of pixels constructed by a standard CMOS process. Each pixel is formed of at least one charge well of minority carriers and a gate oxide layer overlaying the at least one charge well. At least two spaced gate electrodes corresponding in position to the at least two charge wells overlays the gate oxide layer. The space between adjacent electrodes defines a gap to transfer charge between adjacent ones of at the least two spaced gate electrodes and the gap is stabilized. A back-illuminated imager is also described in which photocarriers are diverted from devices integrated with the pixel by a PN junction formed in the pixel structure.Type: GrantFiled: August 30, 2001Date of Patent: September 4, 2007Assignee: Sarnoff CorporationInventors: John Robertson Tower, Peter Alan Levine, Pradyumna Kumar Swain, Nathaniel Joseph McCaffrey, Taner Dosluoglu
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Patent number: 6649454Abstract: A process for forming a portion of a charge coupled device (CCD) is described. More particularly, wells (105) are formed self-aligned under gate stacks (132, 134). By forming wells (105) self-aligned to respective first and second gates (107, 207) of gate stacks (132, 134), potential for misalignment is reduced. First gates (107) of gate stacks (132) may be coupled together, and second gates (207) of gate stacks (134) may be coupled together, and these first and second gates (107, 207) may be coupled to respective signal sources (23, 24) to form a two-phase CCD.Type: GrantFiled: November 10, 2000Date of Patent: November 18, 2003Assignee: Sarnoff CorporationInventors: Pradyumna Kumar Swain, Vipulkumar Kantilal Patel