Patents by Inventor Pradyumna Swain

Pradyumna Swain has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8946818
    Abstract: A method for fabricating a back-illuminated semiconductor imaging device on a semiconductor-on-insulator substrate, and resulting imaging device is disclosed. The device includes an insulator layer; a semiconductor substrate, having an interface with the insulator layer; an epitaxial layer grown on the semiconductor substrate by epitaxial growth; and one or more imaging components in the epitaxial layer in proximity to a face of the epitaxial layer, the face being opposite the interface of the semiconductor substrate and the insulator layer, the imaging components comprising junctions within the epitaxial layer; wherein the semiconductor substrate and the epitaxial layer exhibit a net doping concentration having a maximum value at a predetermined distance from the interface of the insulating layer and the semiconductor substrate and which decreases monotonically on both sides of the profile from the maximum value within a portion of the semiconductor substrate and the epitaxial layer.
    Type: Grant
    Filed: April 15, 2010
    Date of Patent: February 3, 2015
    Assignee: SRI International
    Inventors: Peter Alan Levine, Pradyumna Swain, Mahalingam Bhaskaran
  • Patent number: 8652937
    Abstract: A back-illuminated semiconductor imaging device on a semiconductor-on-insulator substrate is disclosed. The device includes an insulator layer, a semiconductor substrate having an interface with the insulator layer, an epitaxial layer grown on the semiconductor substrate; and one or more imaging components in the epitaxial layer. The semiconductor substrate and the epitaxial layer exhibit a net doping concentration profile having a maximum value at a predetermined distance from the interface which decreases monotonically on both sides of the profile. The doping profile between the interface with the insulation layer and the peak of the doping profile functions as a “dead band” to prevent dark current carriers from penetrating to the front side of the device.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: February 18, 2014
    Assignee: SRI International
    Inventors: Levine Peter Alan, Pradyumna Swain, Mahalingam Bhaskaran
  • Publication number: 20120190150
    Abstract: A back-illuminated semiconductor imaging device on a semiconductor-on-insulator substrate is disclosed. The device includes an insulator layer, a semiconductor substrate having an interface with the insulator layer, an epitaxial layer grown on the semiconductor substrate by epitaxial growth; and one or more imaging components in the epitaxial layer. The semiconductor substrate and the epitaxial layer exhibit a net doping concentration profile having a maximum value at a predetermined distance from the interface which decreases monotonically on both sides of the profile. The doping profile between the interface with the insulation layer and the peak of the doping profile functions as a “dead band” to prevent dark current carriers from penetrating to the front side of the device.
    Type: Application
    Filed: March 13, 2012
    Publication date: July 26, 2012
    Inventors: Peter Alan Levine, Pradyumna Swain, Mahalingam Bhaskaran
  • Publication number: 20100200944
    Abstract: A method for fabricating a back-illuminated semiconductor imaging device on a semiconductor-on-insulator substrate, and resulting imaging device is disclosed. The device includes an insulator layer; a semiconductor substrate, having an interface with the insulator layer; an epitaxial layer grown on the semiconductor substrate by epitaxial growth; and one or more imaging components in the epitaxial layer in proximity to a face of the epitaxial layer, the face being opposite the interface of the semiconductor substrate and the insulator layer, the imaging components comprising junctions within the epitaxial layer; wherein the semiconductor substrate and the epitaxial layer exhibit a net doping concentration having a maximum value at a predetermined distance from the interface of the insulating layer and the semiconductor substrate and which decreases monotonically on both sides of the profile from the maximum value within a portion of the semiconductor substrate and the epitaxial layer.
    Type: Application
    Filed: April 15, 2010
    Publication date: August 12, 2010
    Inventors: Peter Alan Levine, Pradyumna Swain, Mahalingam Bhaskaran
  • Patent number: 7723215
    Abstract: A method for fabricating a back-illuminated semiconductor imaging device on a semiconductor-on-insulator substrate, and resulting imaging device is disclosed. The device includes an insulator layer; a semiconductor substrate, having an interface with the insulator layer; an epitaxial layer grown on the semiconductor substrate by epitaxial growth; and one or more imaging components in the epitaxial layer in proximity to a face of the epitaxial layer, the face being opposite the interface of the semiconductor substrate and the insulator layer, the imaging components comprising junctions within the epitaxial layer; wherein the semiconductor substrate and the epitaxial layer exhibit a net doping concentration having a maximum value at a predetermined distance from the interface of the insulating layer and the semiconductor substrate and which decreases monotonically on both sides of the profile from the maximum value within a portion of the semiconductor substrate and the epitaxial layer.
    Type: Grant
    Filed: May 23, 2007
    Date of Patent: May 25, 2010
    Assignee: Sarnoff Corporation
    Inventors: Peter Alan Levine, Pradyumna Swain, Mahalingam Bhaskaran
  • Publication number: 20070235829
    Abstract: A method for fabricating a back-illuminated semiconductor imaging device on a semiconductor-on-insulator substrate, and resulting imaging device is disclosed. The device includes an insulator layer; a semiconductor substrate, having an interface with the insulator layer; an epitaxial layer grown on the semiconductor substrate by epitaxial growth; and one or more imaging components in the epitaxial layer in proximity to a face of the epitaxial layer, the face being opposite the interface of the semiconductor substrate and the insulator layer, the imaging components comprising junctions within the epitaxial layer; wherein the semiconductor substrate and the epitaxial layer exhibit a net doping concentration having a maximum value at a predetermined distance from the interface of the insulating layer and the semiconductor substrate and which decreases monotonically on both sides of the profile from the maximum value within a portion of the semiconductor substrate and the epitaxial layer.
    Type: Application
    Filed: May 23, 2007
    Publication date: October 11, 2007
    Inventors: Peter Levine, Pradyumna Swain, Mahalingam Bhaskaran
  • Patent number: 7238583
    Abstract: A method for fabricating a back-illuminated semiconductor imaging device on a thin semiconductor-on-insulator substrate, and resulting imaging device. Resulting device has a monotonically varying doping profile which provides a desired electric field and eliminates a dead band proximate to the backside surface.
    Type: Grant
    Filed: February 9, 2006
    Date of Patent: July 3, 2007
    Assignee: Sarnoff Corporation
    Inventors: Pradyumna Swain, Mahalingam Bhaskaran
  • Publication number: 20060186560
    Abstract: A method for fabricating a back-illuminated semiconductor imaging device on a thin semiconductor-on-insulator substrate, and resulting imaging device. Resulting device has a monotonically varying doping profile which provides a desired electric field and eliminates a dead band proximate to the backside surface.
    Type: Application
    Filed: February 9, 2006
    Publication date: August 24, 2006
    Inventors: Pradyumna Swain, Mahalingam Bhaskaran
  • Patent number: 7008547
    Abstract: Provided is a solid phase array of electrical sensors, each comprising a channel and electrical leads for attaching to a voltage, current or resistivity meter for measuring the voltage, current or resistivity through the pore, wherein the channels are formed of a single substrate.
    Type: Grant
    Filed: March 7, 2003
    Date of Patent: March 7, 2006
    Assignee: Sarnoff Corporation
    Inventors: Jia Ming Chen, Yongchi Tian, Zilan Shen, Pradyumna Swain
  • Publication number: 20030174563
    Abstract: Provided is a solid phase array of electrical sensors, each comprising a channel and electrical leads for attaching to a voltage, current or resistivity meter for measuring the voltage, current or resistivity through the pore, wherein the channels are formed of a single substrate.
    Type: Application
    Filed: March 7, 2003
    Publication date: September 18, 2003
    Applicant: Sarnoff Corporation
    Inventors: Jia Ming Chen, Yongchi Tian, Zilan Shen, Pradyumna Swain