Patents by Inventor Pragati Kumar

Pragati Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220336191
    Abstract: A plasma enhanced chemical vapor deposition processing method is provided and includes: preheating a showerhead to a preheated state prior to and in preparation of a plasma enhanced chemical vapor deposition process of a substrate; determining at least one temperature of the showerhead while preheating the showerhead; determining based on the at least one temperature whether to continue preheating the showerhead; ceasing to preheat the showerhead in response to the at least one temperature satisfying a temperature criterion; and initiating the plasma enhanced chemical vapor deposition process while the showerhead is in the preheated state to package previously fabricated integrated circuits disposed on the substrate, wherein the plasma enhanced chemical vapor deposition process includes forming one or more film protective layers over the integrated circuits.
    Type: Application
    Filed: September 16, 2020
    Publication date: October 20, 2022
    Inventors: Boyi HAO, Joseph WEI, Chengzhu QI, Pragati KUMAR, Sardar SARDARI
  • Patent number: 10686867
    Abstract: In various embodiments, streaming data records, files or file segments transmitted from multiple resources in a multi-threaded environment are sorted into one or more time windows via use of one or more execution threads; the records, files or file segments in each time window are displayed, analyzed or delivered to various applications or destinations.
    Type: Grant
    Filed: May 12, 2017
    Date of Patent: June 16, 2020
    Assignee: GUAVUS, INC.
    Inventors: Priyanka Bhaskar, Sucheta Dahiya, Pragati Kumar Dhingra, Mohit Gupta, Devang Sethi
  • Publication number: 20200098562
    Abstract: A method for performing plasma enhanced chemical vapor deposition (PECVD) using a dual frequency process to deposit a silane-based oxide film on a substrate includes arranging the substrate on a substrate support in a processing chamber configured to perform PECVD and supplying PECVD process gases into the processing chamber. The process gases include a first process gas including silicon and a second process gas including an oxidant. The method further includes, while supplying the PECVD process gases into the processing chamber, generating a dual frequency plasma within the processing chamber to deposit the silane-based oxide film on the substrate by supplying a first radio frequency (RF) voltage to the processing chamber, and supplying a second RF voltage to the processing chamber. The first RF voltage is supplied at a first frequency and the second RF voltage is supplied at a second frequency that is different than the first frequency.
    Type: Application
    Filed: September 26, 2018
    Publication date: March 26, 2020
    Inventors: Joseph Wei, Boyi Hao, Pragati Kumar
  • Patent number: 10466934
    Abstract: In various embodiments, network-traffic records overlapping multiple binning windows are prorated such that partial records are stored in each binning window of overlap. In addition, the full, non-prorated record is stored in at least one of the binning windows.
    Type: Grant
    Filed: May 12, 2017
    Date of Patent: November 5, 2019
    Assignee: GUAVUS, INC.
    Inventors: Pragati Kumar Dhingra, Priyanka Bhaskar, Sucheta Dahiya, Devang Sethi, Mohit Gupta
  • Publication number: 20180331922
    Abstract: In various embodiments, network-traffic records overlapping multiple binning windows are prorated such that partial records are stored in each binning window of overlap. In addition, the full, non-prorated record is stored in at least one of the binning windows.
    Type: Application
    Filed: May 12, 2017
    Publication date: November 15, 2018
    Inventors: Pragati Kumar Dhingra, Priyanka Bhaskar, Sucheta Dahiya, Devang Sethi, Mohit Gupta
  • Publication number: 20180331963
    Abstract: A method for identifying an ingress router with collected IP network traffic data captured at an egress router is described. The method includes receiving, at a learning database, an ingress network traffic data flow exported from the ingress router and an ingress interface. The method then proceeds to receive, at a flow processing module, an egress network traffic data flow exported from the egress router and an egress interface. The method then enables the flow processing module to query the learning database with the egress network traffic data flow. The method determines the ingress router corresponding to the egress network traffic data flow, when the learning database matches the egress network traffic data flow with the ingress network traffic data flow.
    Type: Application
    Filed: May 12, 2017
    Publication date: November 15, 2018
    Inventors: Mohinder Paul, Pragati Kumar Dhingra, Aditya Kumar, Atul Saraf
  • Publication number: 20180332100
    Abstract: In various embodiments, streaming data records, files or file segments transmitted from multiple resources in a multi-threaded environment are sorted into one or more time windows via use of one or more execution threads; the records, files or file segments in each time window are displayed, analyzed or delivered to various applications or destinations.
    Type: Application
    Filed: May 12, 2017
    Publication date: November 15, 2018
    Inventors: Priyanka Bhaskar, Sucheta Dahiya, Pragati Kumar Dhingra, Mohit Gupta, Devang Sethi
  • Publication number: 20180300663
    Abstract: A system and method for determining a peer business relationship value is described. The system and method enables at least one peer to communicate with a communications service provider (CSP). The CSP includes a CSP sub-system that determines a data traffic flow for each peer. The CSP sub-system also receives peer information including a total network cost for each peer. The total network cost includes a network asset cost. Additionally, the CSP sub-system determines an attributed revenue for each peer. The CSP sub-system then proceeds to calculate a net margin by subtracting the total network cost from the attributed revenue. The CSP sub-system then calculates the margin per unit traffic by taking the net margin and dividing by the data traffic flow. The CSP sub-system then calculates the net margin percentage by taking the net margin and dividing it by the attributed revenue.
    Type: Application
    Filed: April 17, 2017
    Publication date: October 18, 2018
    Inventors: Mohinder Paul, Aditya Kumar, Pragati Kumar Dhingra
  • Patent number: 9397292
    Abstract: Resistive switching nonvolatile memory elements are provided. A metal-containing layer and an oxide layer for a memory element can be heated using rapid thermal annealing techniques. During heating, the oxide layer may decompose and react with the metal-containing layer. Oxygen from the decomposing oxide layer may form a metal oxide with metal from the metal-containing layer. The resulting metal oxide may exhibit resistive switching for the resistive switching memory elements.
    Type: Grant
    Filed: October 2, 2014
    Date of Patent: July 19, 2016
    Assignee: Intermolecular, Inc.
    Inventors: Pragati Kumar, Sean Barstow, Tony P. Chiang, Sunil Shanker
  • Patent number: 9362497
    Abstract: This disclosure provides a nonvolatile memory device and related methods of manufacture and operation. The device may include one or more resistive random access memory (ReRAM) approaches to provide a memory device with more predictable operation. In particular, the forming voltage required by particular designs may be reduced through the use of a barrier layer, a reverse polarity forming voltage pulse, a forming voltage pulse where electrons are injected from a lower work function electrode, or an anneal in a reducing environment. One or more of these techniques may be applied, depending on the desired application and results.
    Type: Grant
    Filed: January 13, 2015
    Date of Patent: June 7, 2016
    Assignee: Intermolecular, Inc.
    Inventors: Pragati Kumar, Tony P. Chiang, Prashant B Phatak, Yun Wang
  • Patent number: 9276211
    Abstract: Non-volatile resistive-switching memories are described, including a memory element having a first electrode, a second electrode, a metal oxide between the first electrode and the second electrode. The metal oxide switches using bulk-mediated switching, has a bandgap greater than 4 electron volts (eV), has a set voltage for a set operation of at least one volt per one hundred angstroms of a thickness of the metal oxide, and has a leakage current density less than 40 amps per square centimeter (A/cm2) measured at 0.5 volts (V) per twenty angstroms of the thickness of the metal oxide.
    Type: Grant
    Filed: May 26, 2015
    Date of Patent: March 1, 2016
    Assignee: Intermolecular, Inc.
    Inventors: Prashant B Phatak, Tony P. Chiang, Pragati Kumar, Michael Miller
  • Patent number: 9252360
    Abstract: ALD processing techniques for forming non-volatile resistive-switching memories are described. In one embodiment, a method includes forming a first electrode on a substrate, maintaining a pedestal temperature for an atomic layer deposition (ALD) process of less than 100° Celsius, forming at least one metal oxide layer over the first electrode, wherein the forming the at least one metal oxide layer is performed using the ALD process using a purge duration of less than 20 seconds, and forming a second electrode over the at least one metal oxide layer.
    Type: Grant
    Filed: August 25, 2014
    Date of Patent: February 2, 2016
    Assignee: Intermolecular, Inc.
    Inventors: Nobumichi Fuchigami, Pragati Kumar, Prashant B Phatak
  • Publication number: 20150255716
    Abstract: Non-volatile resistive-switching memories are described, including a memory element having a first electrode, a second electrode, a metal oxide between the first electrode and the second electrode. The metal oxide switches using bulk-mediated switching, has a bandgap greater than 4 electron volts (eV), has a set voltage for a set operation of at least one volt per one hundred angstroms of a thickness of the metal oxide, and has a leakage current density less than 40 amps per square centimeter (A/cm2) measured at 0.5 volts (V) per twenty angstroms of the thickness of the metal oxide.
    Type: Application
    Filed: May 26, 2015
    Publication date: September 10, 2015
    Inventors: Prashant B Phatak, Tony P. Chiang, Pragati Kumar, Michael Miller
  • Patent number: 9082782
    Abstract: This disclosure provides a method of fabricating a semiconductor stack and associated device, such as a capacitor and DRAM cell. In particular, a bottom electrode has a material selected for lattice matching characteristics. This material may be created from a relatively inexpensive metal oxide which is processed to adopt a conductive, but difficult-to-produce oxide state, with specific crystalline form; to provide one example, specific materials are disclosed that are compatible with the growth of rutile phase titanium dioxide (TiO2) for use as a dielectric, thereby leading to predictable and reproducible higher dielectric constant and lower effective oxide thickness and, thus, greater part density at lower cost.
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: July 14, 2015
    Assignee: Intermolecular, Inc.
    Inventors: Hanhong Chen, Toshiyuki Hirota, Pragati Kumar, Xiangxin Rui, Sunil Shanker
  • Patent number: 9070867
    Abstract: Non-volatile resistive-switching memories are described, including a memory element having a first electrode, a second electrode, a metal oxide between the first electrode and the second electrode. The metal oxide switches using bulk-mediated switching, has a bandgap greater than 4 electron volts (eV), has a set voltage for a set operation of at least one volt per one hundred angstroms of a thickness of the metal oxide, and has a leakage current density less than 40 amps per square centimeter (A/cm2) measured at 0.5 volts (V) per twenty angstroms of the thickness of the metal oxide.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: June 30, 2015
    Assignee: Intermolecular, Inc.
    Inventors: Prashant B Phatak, Tony P. Chiang, Pragati Kumar, Michael Miller
  • Publication number: 20150137064
    Abstract: This disclosure provides a nonvolatile memory device and related methods of manufacture and operation. The device may include one or more resistive random access memory (ReRAM) approaches to provide a memory device with more predictable operation. In particular, the forming voltage required by particular designs may be reduced through the use of a barrier layer, a reverse polarity forming voltage pulse, a forming voltage pulse where electrons are injected from a lower work function electrode, or an anneal in a reducing environment. One or more of these techniques may be applied, depending on the desired application and results.
    Type: Application
    Filed: January 13, 2015
    Publication date: May 21, 2015
    Inventors: Pragati Kumar, Tony P. Chiang, Prashant B. Phatak, Yun Wang
  • Patent number: 9029232
    Abstract: Nonvolatile memory elements that are based on resistive switching memory element layers are provided. A nonvolatile memory element may have a resistive switching metal oxide layer. The resistive switching metal oxide layer may have one or more layers of oxide. A resistive switching metal oxide may be doped with a dopant that increases its melting temperature and enhances its thermal stability. Layers may be formed to enhance the thermal stability of the nonvolatile memory element. An electrode for a nonvolatile memory element may contain a conductive layer and a buffer layer.
    Type: Grant
    Filed: May 19, 2014
    Date of Patent: May 12, 2015
    Assignee: Intermolecular, Inc.
    Inventors: Sandra G Malhotra, Sean Barstow, Tony P. Chiang, Wayne R French, Pragati Kumar, Prashant B Phatak, Sunil Shanker, Wen Wu
  • Patent number: 9030862
    Abstract: Nonvolatile memory elements including resistive switching metal oxides may be formed in one or more layers on an integrated circuit. Each memory element may have a first conductive layer, a metal oxide layer, and a second conductive layer. Electrical devices such as diodes may be coupled in series with the memory elements. The first conductive layer may be formed from a metal nitride. The metal oxide layer may contain the same metal as the first conductive layer. The metal oxide may form an ohmic contact or a Schottky contact with the first conductive layer. The second conductive layer may form an ohmic contact or Schottky contact with the metal oxide layer. The first conductive layer, the metal oxide layer, and the second conductive layer may include sublayers. The second conductive layer may include an adhesion or barrier layer and a workfunction control layer.
    Type: Grant
    Filed: September 17, 2014
    Date of Patent: May 12, 2015
    Assignee: Intermolecular, Inc.
    Inventors: Pragati Kumar, Sean Barstow, Tony P. Chiang, Sandra G Malhotra
  • Publication number: 20150097153
    Abstract: Non-volatile resistive-switching memories are described, including a memory element having a first electrode, a second electrode, a metal oxide between the first electrode and the second electrode. The metal oxide switches using bulk-mediated switching, has a bandgap greater than 4 electron volts (eV), has a set voltage for a set operation of at least one volt per one hundred angstroms of a thickness of the metal oxide, and has a leakage current density less than 40 amps per square centimeter (A/cm2) measured at 0.5 volts (V) per twenty angstroms of the thickness of the metal oxide.
    Type: Application
    Filed: November 21, 2014
    Publication date: April 9, 2015
    Inventors: Prashant B. Phatak, Tony P. Chiang, Pragati Kumar, Michael Miller
  • Patent number: 8980744
    Abstract: This disclosure provides a method of fabricating a semiconductor stack and associated device, such as a capacitor and DRAM cell. In particular, a bottom electrode has a material selected for lattice matching characteristics. This material may be created from a relatively inexpensive metal oxide which is processed to adopt a conductive, but difficult-to-produce oxide state, with specific crystalline form; to provide one example, specific materials are disclosed that are compatible with the growth of rutile phase titanium dioxide (TiO2) for use as a dielectric, thereby leading to predictable and reproducible higher dielectric constant and lower effective oxide thickness and, thus, greater part density at lower cost.
    Type: Grant
    Filed: November 13, 2012
    Date of Patent: March 17, 2015
    Assignees: Intermolecular, Inc., Elpida Memory, Inc.
    Inventors: Hanhong Chen, Toshiyuki Hirota, Pragati Kumar, Xiangxin Rui, Sunil Shanker