Patents by Inventor Prakash B. GOTHOSKAR

Prakash B. GOTHOSKAR has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240094567
    Abstract: An optical modulator may include a lower waveguide, an upper waveguide, and a dielectric layer disposed therebetween. When a voltage potential is created between the lower and upper waveguides, these layers form a silicon-insulator-silicon capacitor (also referred to as SISCAP) guide that provides efficient, high-speed optical modulation of an optical signal passing through the modulator. In one embodiment, at least one of the waveguides includes a respective ridge portion aligned at a charge modulation region which may aid in confining the optical mode laterally (e.g., in the width direction) in the optical modulator. In another embodiment, ridge portions may be formed on both the lower and the upper waveguides. These ridge portions may be aligned in a vertical direction (e.g., a thickness direction) so that ridges overlap which may further improve optical efficiency by centering an optical mode in the charge modulation region.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 21, 2024
    Inventors: Donald J. ADAMS, Prakash B. GOTHOSKAR, Vipulkumar J. PATEL, Mark J. WEBSTER
  • Patent number: 11906824
    Abstract: Embodiments provide for an optical modulator, comprising: a lower guide, comprising: a lower hub, made of monocrystalline silicon; and a lower ridge, made of monocrystalline silicon that extends in a first direction from the lower hub; an upper guide, including: an upper hub; and an upper ridge, made of monocrystalline silicon that extends in a second direction, opposite of the first direction, from the upper hub and is aligned with the lower ridge; and a gate oxide layer separating the lower ridge from the upper ridge and defining a waveguide region with the lower guide and the upper guide.
    Type: Grant
    Filed: March 2, 2023
    Date of Patent: February 20, 2024
    Assignee: Cisco Technology, Inc.
    Inventors: Xunyuan Zhang, Vipulkumar K. Patel, Prakash B. Gothoskar, Ming Gai Stanley Lo
  • Patent number: 11886056
    Abstract: An optical modulator may include a lower waveguide, an upper waveguide, and a dielectric layer disposed therebetween. When a voltage potential is created between the lower and upper waveguides, these layers form a silicon-insulator-silicon capacitor (also referred to as SISCAP) guide that provides efficient, high-speed optical modulation of an optical signal passing through the modulator. In one embodiment, at least one of the waveguides includes a respective ridge portion aligned at a charge modulation region which may aid in confining the optical mode laterally (e.g., in the width direction) in the optical modulator. In another embodiment, ridge portions may be formed on both the lower and the upper waveguides. These ridge portions may be aligned in a vertical direction (e.g., a thickness direction) so that ridges overlap which may further improve optical efficiency by centering an optical mode in the charge modulation region.
    Type: Grant
    Filed: November 24, 2021
    Date of Patent: January 30, 2024
    Assignee: Cisco Technology, Inc.
    Inventors: Donald Adams, Prakash B. Gothoskar, Vipulkumar Patel, Mark Webster
  • Patent number: 11762159
    Abstract: Embodiments described herein include an apparatus comprising a semiconductor-based photodiode disposed on a semiconductor layer, and an optical waveguide spaced apart from the semiconductor layer and evanescently coupled with a depletion region of the photodiode. The photodiode may be arranged as a vertical photodiode or a lateral photodiode.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: September 19, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Prakash B. Gothoskar, Vipulkumar K. Patel, Soha Namnabat, Ravi S. Tummidi
  • Publication number: 20230290898
    Abstract: The embodiments of the present disclosure describe a stressed Ge PD and fabrications techniques for making the same. In one embodiment, a stressor material is deposited underneath an already formed Ge PD. To do so, wafer bonding can be used to bond the wafer containing the Ge PD to a second, handler wafer. Doing so provides support to remove the substrate of the wafer so that a stressor material (e.g., silicon nitride, diamond-like carbon, or silicon-germanium) can be disposed underneath the Ge PD. The stress material induces a stress or strain in the crystal lattice of the Ge which changes its bandgap and improves its responsivity.
    Type: Application
    Filed: May 16, 2023
    Publication date: September 14, 2023
    Inventors: Xunyuan ZHANG, Li LI, Prakash B. GOTHOSKAR, Soha NAMNABAT
  • Patent number: 11754784
    Abstract: Embodiments presented in this disclosure generally relate to an optical device having a grating coupler for redirection of optical signals. One embodiment includes a grating coupler. The grating coupler generally includes a waveguide layer, a thickness of a waveguide layer portion of the waveguide layer being tapered, the thickness defining a direction, and a grating layer disposed above the waveguide layer and perpendicular to the direction where at least a grating layer portion of the grating layer overlaps the waveguide layer portion of the waveguide layer along the direction. Some embodiments are directed to grating coupler implemented with material layers above and a reflector layer below a grating layer, facilitating redirection and confinement of light that improves coupling loss and bandwidth. The material layers and reflector layer above and below the grating layer may be implemented with or without the waveguide layer being tapered.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: September 12, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Tao Ling, Shiyi Chen, Xunyuan Zhang, Prakash B. Gothoskar
  • Patent number: 11742451
    Abstract: The embodiments of the present disclosure describe a stressed Ge PD and fabrications techniques for making the same. In one embodiment, a stressor material is deposited underneath an already formed Ge PD. To do so, wafer bonding can be used to bond the wafer containing the Ge PD to a second, handler wafer. Doing so provides support to remove the substrate of the wafer so that a stressor material (e.g., silicon nitride, diamond-like carbon, or silicon-germanium) can be disposed underneath the Ge PD. The stress material induces a stress or strain in the crystal lattice of the Ge which changes its bandgap and improves its responsivity.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: August 29, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Xunyuan Zhang, Li Li, Prakash B. Gothoskar, Soha Namnabat
  • Publication number: 20230204987
    Abstract: Embodiments provide for an optical modulator, comprising: a lower guide, comprising: a lower hub, made of monocrystalline silicon; and a lower ridge, made of monocrystalline silicon that extends in a first direction from the lower hub; an upper guide, including: an upper hub; and an upper ridge, made of monocrystalline silicon that extends in a second direction, opposite of the first direction, from the upper hub and is aligned with the lower ridge; and a gate oxide layer separating the lower ridge from the upper ridge and defining a waveguide region with the lower guide and the upper guide.
    Type: Application
    Filed: March 2, 2023
    Publication date: June 29, 2023
    Inventors: Xunyuan ZHANG, Vipulkumar K. PATEL, Prakash B. GOTHOSKAR, Ming Gai Stanley LO
  • Publication number: 20230119450
    Abstract: Fabrication-tolerant on-chip multiplexers and demultiplexers are provides via a lattice filter interleaver configured to receive an input signal including a plurality of individual signals and to produce a first interleaved signal with a first subset of the plurality of individual signals and a second interleaved signal with a second subset of the plurality of individual signals; a first Bragg interleaver configured to receive the first interleaved signal and produce a first output signal including a first individual signal of the plurality of individual signals and a second output signal including a second individual signal of the plurality of individual signals; and a second Bragg interleaver configured to receive the second interleaved signal and produce a third output signal including a third individual signal of the plurality of individual signals and a fourth output signal including a fourth individual signal of the plurality of individual signals.
    Type: Application
    Filed: October 18, 2021
    Publication date: April 20, 2023
    Inventors: Yi Ho LEE, Tao LING, Ravi S. TUMMIDI, Mark A. WEBSTER, Prakash B. GOTHOSKAR
  • Patent number: 11619838
    Abstract: Embodiments provide for an optical modulator, comprising: a lower guide, comprising: a lower hub, made of monocrystalline silicon; and a lower ridge, made of monocrystalline silicon that extends in a first direction from the lower hub; an upper guide, including: an upper hub; and an upper ridge, made of monocrystalline silicon that extends in a second direction, opposite of the first direction, from the upper hub and is aligned with the lower ridge; and a gate oxide layer separating the lower ridge from the upper ridge and defining a waveguide region with the lower guide and the upper guide.
    Type: Grant
    Filed: May 7, 2021
    Date of Patent: April 4, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Xunyuan Zhang, Vipulkumar K. Patel, Prakash B. Gothoskar, Ming Gai Stanley Lo
  • Publication number: 20230074516
    Abstract: Embodiments presented in this disclosure generally relate to an optical device having a grating coupler for redirection of optical signals. One embodiment includes a grating coupler. The grating coupler generally includes a waveguide layer, a thickness of a waveguide layer portion of the waveguide layer being tapered, the thickness defining a direction, and a grating layer disposed above the waveguide layer and perpendicular to the direction where at least a grating layer portion of the grating layer overlaps the waveguide layer portion of the waveguide layer along the direction. Some embodiments are directed to grating coupler implemented with material layers above and a reflector layer below a grating layer, facilitating redirection and confinement of light that improves coupling loss and bandwidth. The material layers and reflector layer above and below the grating layer may be implemented with or without the waveguide layer being tapered.
    Type: Application
    Filed: September 8, 2021
    Publication date: March 9, 2023
    Inventors: Tao LING, Shiyi CHEN, Xunyuan ZHANG, Prakash B. GOTHOSKAR
  • Patent number: 11513375
    Abstract: A thermo-optic phase shifter comprises an optical waveguide comprising a P-type region comprising a first contact, an N-type region comprising a second contact, and a waveguide region disposed between the P-type region and the N-type region and having a raised portion. The thermo-optic phase shifter further comprises one or more heating elements. The one or more heating elements include one or more discrete resistive heating elements or the P-type and N-type regions driven as resistive heating elements.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: November 29, 2022
    Assignee: Cisco Technology, Inc.
    Inventors: Ming Gai Stanley Lo, Vipulkumar K. Patel, Mark A. Webster, Prakash B. Gothoskar
  • Publication number: 20220165907
    Abstract: The embodiments of the present disclosure describe a stressed Ge PD and fabrications techniques for making the same. In one embodiment, a stressor material is deposited underneath an already formed Ge PD. To do so, wafer bonding can be used to bond the wafer containing the Ge PD to a second, handler wafer. Doing so provides support to remove the substrate of the wafer so that a stressor material (e.g., silicon nitride, diamond-like carbon, or silicon-germanium) can be disposed underneath the Ge PD. The stress material induces a stress or strain in the crystal lattice of the Ge which changes its bandgap and improves its responsivity.
    Type: Application
    Filed: November 24, 2020
    Publication date: May 26, 2022
    Inventors: Xunyuan ZHANG, Li LI, Prakash B. GOTHOSKAR, Soha NAMNABAT
  • Publication number: 20220082875
    Abstract: An optical modulator may include a lower waveguide, an upper waveguide, and a dielectric layer disposed therebetween. When a voltage potential is created between the lower and upper waveguides, these layers form a silicon-insulator-silicon capacitor (also referred to as SISCAP) guide that provides efficient, high-speed optical modulation of an optical signal passing through the modulator. In one embodiment, at least one of the waveguides includes a respective ridge portion aligned at a charge modulation region which may aid in confining the optical mode laterally (e.g., in the width direction) in the optical modulator. In another embodiment, ridge portions may be formed on both the lower and the upper waveguides. These ridge portions may be aligned in a vertical direction (e.g., a thickness direction) so that ridges overlap which may further improve optical efficiency by centering an optical mode in the charge modulation region.
    Type: Application
    Filed: November 24, 2021
    Publication date: March 17, 2022
    Inventors: Donald ADAMS, Prakash B. GOTHOSKAR, Vipulkumar PATEL, Mark WEBSTER
  • Patent number: 11226505
    Abstract: An optical modulator may include a lower waveguide, an upper waveguide, and a dielectric layer disposed therebetween. When a voltage potential is created between the lower and upper waveguides, these layers form a silicon-insulator-silicon capacitor (also referred to as SISCAP) guide that provides efficient, high-speed optical modulation of an optical signal passing through the modulator. In one embodiment, at least one of the waveguides includes a respective ridge portion aligned at a charge modulation region which may aid in confining the optical mode laterally (e.g., in the width direction) in the optical modulator. In another embodiment, ridge portions may be formed on both the lower and the upper waveguides. These ridge portions may be aligned in a vertical direction (e.g., a thickness direction) so that ridges overlap which may further improve optical efficiency by centering an optical mode in the charge modulation region.
    Type: Grant
    Filed: February 12, 2020
    Date of Patent: January 18, 2022
    Assignee: Cisco Technology, Inc.
    Inventors: Donald Adams, Prakash B. Gothoskar, Vipulkumar Patel, Mark Webster
  • Publication number: 20210278615
    Abstract: Embodiments described herein include an apparatus comprising a semiconductor-based photodiode disposed on a semiconductor layer, and an optical waveguide spaced apart from the semiconductor layer and evanescently coupled with a depletion region of the photodiode. The photodiode may be arranged as a vertical photodiode or a lateral photodiode.
    Type: Application
    Filed: May 13, 2021
    Publication date: September 9, 2021
    Inventors: Prakash B. GOTHOSKAR, Vipulkumar K. PATEL, Soha NAMNABAT, Ravi S. TUMMIDI
  • Publication number: 20210263351
    Abstract: Embodiments provide for an optical modulator, comprising: a lower guide, comprising: a lower hub, made of monocrystalline silicon; and a lower ridge, made of monocrystalline silicon that extends in a first direction from the lower hub; an upper guide, including: an upper hub; and an upper ridge, made of monocrystalline silicon that extends in a second direction, opposite of the first direction, from the upper hub and is aligned with the lower ridge; and a gate oxide layer separating the lower ridge from the upper ridge and defining a waveguide region with the lower guide and the upper guide.
    Type: Application
    Filed: May 7, 2021
    Publication date: August 26, 2021
    Inventors: Xunyuan ZHANG, Vipulkumar K. PATEL, Prakash B. GOTHOSKAR, Ming Gai Stanley LO
  • Patent number: 11067765
    Abstract: Embodiments described herein include an apparatus comprising a semiconductor-based photodiode disposed on a semiconductor layer, and an optical waveguide spaced apart from the semiconductor layer and evanescently coupled with a depletion region of the photodiode. The photodiode may be arranged as a vertical photodiode or a lateral photodiode.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: July 20, 2021
    Assignee: Cisco Technology, Inc.
    Inventors: Prakash B. Gothoskar, Vipulkumar K. Patel, Soha Namnabat, Ravi S. Tummidi
  • Patent number: 11042050
    Abstract: Embodiments herein describe reverse biasing one or more PIN junctions formed in at least one layer of a PSR. The resulting electric fields in the PIN junctions overlap with the optical path of the optical signal and sweep away photo-generated hole-electron free carriers away. That is, the electric fields in the PIN junctions remove the free carriers from the path of the optical signal and reduces the population of the free carriers, thereby mitigating the negative impact of free-carrier absorption (FCA).
    Type: Grant
    Filed: December 9, 2019
    Date of Patent: June 22, 2021
    Assignee: Cisco Technology, Inc.
    Inventors: Yi Ho Lee, Ming Gai Stanley Lo, Vipulkumar K. Patel, Prakash B. Gothoskar
  • Publication number: 20210181543
    Abstract: A thermo-optic phase shifter comprises an optical waveguide comprising a P-type region comprising a first contact, an N-type region comprising a second contact, and a waveguide region disposed between the P-type region and the N-type region and having a raised portion. The thermo-optic phase shifter further comprises one or more heating elements. The one or more heating elements include one or more discrete resistive heating elements or the P-type and N-type regions driven as resistive heating elements.
    Type: Application
    Filed: December 16, 2019
    Publication date: June 17, 2021
    Inventors: Ming Gai Stanley LO, Vipulkumar K. PATEL, Mark A. WEBSTER, Prakash B. GOTHOSKAR