Patents by Inventor Prakash Bhatia

Prakash Bhatia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100243025
    Abstract: A windows treatment device includes a component for generating electrical current from incident light, a battery, and a component for generating light.
    Type: Application
    Filed: March 21, 2010
    Publication date: September 30, 2010
    Inventors: Sneha P. Bhatia, Jayshiv Ramrakha, Nikhil P. Bhatia, Prakash Bhatia
  • Patent number: 7298659
    Abstract: A method and system for testing the individual memory cells of a volatile memory cell array (e.g., SRAM) for data retention faults are described. In one embodiment of the invention, adjacent memory cells connected by a pair of common bit-lines are written with opposite, or complementary, data, for example, logical “0” and logical “1”. Next, the two memory cells are subjected to a stress condition by pre-charging the common bit-lines connecting the two adjacent memory cells, and then simultaneously asserting the word-line of each memory cell. Finally, the data in each cell is read and compared with the data written to the cell prior to generating the stress condition.
    Type: Grant
    Filed: June 7, 2005
    Date of Patent: November 20, 2007
    Assignee: Virage Logic Corporation
    Inventors: Subramani Kengeri, Deepak Sabharwal, Prakash Bhatia, Sanjiv Kainth
  • Patent number: 7251186
    Abstract: A multi-port memory device with an array of single-port memory cells is disclosed. According to one embodiment of the invention, the multi-port memory device has N number of memory ports, and is capable of performing any combination of N number of read/write operations during a single cycle of an externally generated core clock signal, without the need of any other externally generated clocking signals.
    Type: Grant
    Filed: June 7, 2005
    Date of Patent: July 31, 2007
    Assignee: Virage Logic Corporation
    Inventors: Subramani Kengeri, Deepak Sabharwal, Prakash Bhatia, Shreekanth Sampigethaya, Sanjiv Kainth