Patents by Inventor Prakash Ganesan

Prakash Ganesan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230299689
    Abstract: An inverter unit includes an inverter and an inverter housing. The inverter drives an electric motor and includes at least one power module and a printed circuit board. The power module converts a High Voltage (HV) Direct Current (DC) to a three-phase Alternating Current (AC) that drives the electric motor. The power module includes lead frames to be received in apertures formed on the PCB. The PCB configured with electronic components mounted thereon controls the electric motor. The inverter housing includes a front head and a cover. The cover in conjunction with the front head defines an enclosure for receiving the inverter. The inverter unit includes support elements to support the power module in a hanging configuration with respect to the PCB.
    Type: Application
    Filed: March 21, 2023
    Publication date: September 21, 2023
    Applicant: Valeo Japan Co., Ltd.
    Inventors: Praveen Mathesan, Prakash Ganesan, Vigneshwar Narayanamoorthy, Baskaran Raja, Herve Ribot, Sangeetha Sethulingam, Philippe Mercier, Saravanan Balasundaram
  • Publication number: 20230170833
    Abstract: An inverter unit (100) includes an inverter (110), an inverter housing (120) and an insulating member (130). The inverter (110) drives an electric motor (200) and includes at least one power module (112) for converting a High Voltage (HV) Direct Current (DC) to a three-phase Alternating Current (AC) that drives the electric motor (200). The inverter housing (120) receives the inverter (110). The power module (112) is mounted on an end wall (120a) of the inverter housing (120) by means of bolts (114). The insulating member (130) corresponding to each bolt (114) is disposed between a head portion (114a) of the corresponding bolt (114) and the power module (112).
    Type: Application
    Filed: November 28, 2022
    Publication date: June 1, 2023
    Applicant: Valeo Japan Co., Ltd
    Inventors: Mathieu Varillon, Herve Ribot, Augustin Bellet, Praveen Mathesan, Baskaran Raja, Prakash Ganesan
  • Publication number: 20190237391
    Abstract: A stacked-chip assembly including a plurality of IC chips or die that are stacked, and electrically coupled by solder bonds. In accordance with some embodiments described further below, the solder bonds are to contact a back-side land that includes a diffusion barrier to reduce intermetallic formation and/or other solder-induced reliability issues. The back-side land may include an electrolytic nickel (Ni) barrier layer separating solder from a back-side redistribution layer trace. This electrolytic Ni may be of high purity, which at least in part, may enable the backside metallization stack to be of minimal thickness while still functioning as a diffusion barrier. In some embodiments, the back-side land composition and architecture is distinct from a front-side land composition and/or architecture.
    Type: Application
    Filed: October 27, 2016
    Publication date: August 1, 2019
    Applicant: Intel Corporation
    Inventors: Seshu V. SATTIRAJU, Krishna Prakash GANESAN, Ashish BHATIA, Vinay SRIRAM, John MUIRHEAD, Hiten KOTHARI, Aloysius A. GUNAWAN, Lavanya ARYASOMAYAJULA, Shravan GOWRISHANKAR, Sriram PATTABHIRAMAN, Sudipto GUHA