Patents by Inventor Prakash Gothoskar
Prakash Gothoskar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11609382Abstract: Presented herein is a tray for shipping, handling, and/or processing optomechanical components. The tray has a plurality of pockets arranged in an array, wherein each pocket is configured to hold one optomechanical component, and wherein each pocket includes at least one fiducial hole, at least one vacuum hole, a first cradle element configured to support a clip that attaches to one or more optical fibers of the optomechanical component, and a second cradle element configured to support a head of the optomechanical component. Also presented herein is a clip for an optomechanical component that includes a body having a top face and a bottom face, and a plurality of gripping elements arranged in pairs on the bottom face, each pair of gripping elements configured to support a barrel of an optical connector attached to a corresponding optical fiber of the pair of optical fibers.Type: GrantFiled: February 9, 2021Date of Patent: March 21, 2023Assignee: CISCO TECHNOLOGY, INC.Inventors: Neeraj Kumar Dubey, Adam Jacob Forrer, Steven Luther Moyer, Prakash Gothoskar
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Publication number: 20210165167Abstract: Presented herein is a tray for shipping, handling, and/or processing optomechanical components. The tray has a plurality of pockets arranged in an array, wherein each pocket is configured to hold one optomechanical component, and wherein each pocket includes at least one fiducial hole, at least one vacuum hole, a first cradle element configured to support a clip that attaches to one or more optical fibers of the optomechanical component, and a second cradle element configured to support a head of the optomechanical component. Also presented herein is a clip for an optomechanical component that includes a body having a top face and a bottom face, and a plurality of gripping elements arranged in pairs on the bottom face, each pair of gripping elements configured to support a barrel of an optical connector attached to a corresponding optical fiber of the pair of optical fibers.Type: ApplicationFiled: February 9, 2021Publication date: June 3, 2021Inventors: Neeraj Kumar Dubey, Adam Jacob Forrer, Steven Luther Moyer, Prakash Gothoskar
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Patent number: 10976498Abstract: Presented herein is a tray for shipping, handling, and/or processing optomechanical components. The tray has a plurality of pockets arranged in an array, wherein each pocket is configured to hold one optomechanical component, and wherein each pocket includes at least one fiducial hole, at least one vacuum hole, a first cradle element configured to support a clip that attaches to one or more optical fibers of the optomechanical component, and a second cradle element configured to support a head of the optomechanical component. Also presented herein is a clip for an optomechanical component that includes a body having a top face and a bottom face, and a plurality of gripping elements arranged in pairs on the bottom face, each pair of gripping elements configured to support a barrel of an optical connector attached to a corresponding optical fiber of the pair of optical fibers.Type: GrantFiled: November 26, 2019Date of Patent: April 13, 2021Assignee: CISCO TECHNOLOGY, INC.Inventors: Neeraj Kumar Dubey, Adam Jacob Forrer, Steven Luther Moyer, Prakash Gothoskar
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Publication number: 20200393624Abstract: Presented herein is a tray for shipping, handling, and/or processing optomechanical components. The tray has a plurality of pockets arranged in an array, wherein each pocket is configured to hold one optomechanical component, and wherein each pocket includes at least one fiducial hole, at least one vacuum hole, a first cradle element configured to support a clip that attaches to one or more optical fibers of the optomechanical component, and a second cradle element configured to support a head of the optomechanical component. Also presented herein is a clip for an optomechanical component that includes a body having a top face and a bottom face, and a plurality of gripping elements arranged in pairs on the bottom face, each pair of gripping elements configured to support a barrel of an optical connector attached to a corresponding optical fiber of the pair of optical fibers.Type: ApplicationFiled: November 26, 2019Publication date: December 17, 2020Inventors: Neeraj Kumar Dubey, Adam Jacob Forrer, Steven Luther Moyer, Prakash Gothoskar
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Patent number: 10175448Abstract: An arrangement for improving adhesive attachment of micro-components in an assembly utilizes a plurality of parallel-disposed slots formed in the top surface of the substrate used to support the micro-components. The slots are used to control the flow and “shape” of an adhesive “dot” so as to quickly and accurately attach a micro-component to the surface of a substrate. The slots are formed (preferably, etched) in the surface of the substrate in a manner that lends itself to reproducible accuracy from one substrate to another. Other slots (“channels”) may be formed in conjunction with the bonding slots so that extraneous adhesive material will flow into these channels and not spread into unwanted areas.Type: GrantFiled: July 15, 2014Date of Patent: January 8, 2019Assignee: Cisco Technology, Inc.Inventors: Mary Nadeau, Vipulkumar Patel, Prakash Gothoskar, John Fangman, John Matthew Fangman, Mark Webster
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Patent number: 9978890Abstract: Embodiments herein describe a photonic device that includes a germanium photodetector coupled to multiple silicon waveguides. In one embodiment, the silicon waveguides optically couple to a layer of germanium material. In one embodiment, if the germanium material forms a polygon, then a respective silicon waveguide optically couple to each of the corners of the polygon. Each of the plurality of input silicon waveguides may be arranged to transmit light in a direction under the germanium that is offset relative to both sides of the germanium forming the respective corner. In another example, the germanium material may be a circle or ellipse in which case the silicon waveguides terminate at or close to a non-straight, curved surface of the germanium material. As described below, optically coupling the silicon waveguides at a non-straight surface can reduce the distance charge carriers have to travel in the optical detector which can improve bandwidth.Type: GrantFiled: February 23, 2017Date of Patent: May 22, 2018Assignee: Cisco Technology, Inc.Inventors: Igal I. Bayn, Vipulkumar Patel, Sean P. Anderson, Prakash Gothoskar
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Patent number: 9766484Abstract: An optical modulator may include a lower waveguide, an upper waveguide, and a dielectric layer disposed therebetween. When a voltage potential is created between the lower and upper waveguides, these layers form a silicon-insulator-silicon capacitor (also referred to as SISCAP) guide that provides efficient, high-speed optical modulation of an optical signal passing through the modulator. In one embodiment, at least one of the waveguides includes a respective ridge portion aligned at a charge modulation region which may aid in confining the optical mode laterally (e.g., in the width direction) in the optical modulator. In another embodiment, ridge portions may be formed on both the lower and the upper waveguides. These ridge portions may be aligned in a vertical direction (e.g., a thickness direction) so that ridges overlap which may further improve optical efficiency by centering an optical mode in the charge modulation region.Type: GrantFiled: April 8, 2014Date of Patent: September 19, 2017Assignee: Cisco Technology, Inc.Inventors: Donald Adams, Prakash Gothoskar, Vipulkumar Patel, Mark Webster
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Patent number: 9632335Abstract: An optical modulator may include a leftmost waveguide, a rightmost waveguide, and a dielectric layer disposed therebetween. In one embodiment, the waveguides may be disposed on the same plane. When a voltage potential is created between the rightmost and leftmost waveguides, these layers form a silicon-insulator-silicon capacitor (also referred to as SISCAP) structure that provides efficient, high-speed optical modulation of an optical signal passing through the modulator. As opposed to a horizontal SISCAP structure where the dielectric layer is disposed between upper and lower waveguides, arranging the dielectric layer between waveguides disposed on the same plane results in a vertical SISCAP structure. In one embodiment, the leftmost and rightmost waveguide are both made from crystalline silicon.Type: GrantFiled: January 28, 2016Date of Patent: April 25, 2017Assignee: Cisco Technology, Inc.Inventors: Vipulkumar Patel, Prakash Gothoskar
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Patent number: 9419718Abstract: Embodiments described herein describe a sub-mount that is etched to include respective cavities with at least two adjacent sides that align optical filters and a mirror. Moreover, the cavities are arranged on the sub-mount such that when the filters and mirror are disposed in the cavities, they align in a manner that enables the performance of a multiplexing or demultiplexing function as part of, for example, a zigzag multiplexer/demultiplexer. In one embodiment, the filters and mirrors are aligned passively rather than actively. The sub-mount may then be placed on a substrate that includes other components of a ROSA or TOSA. In one embodiment, the substrate is also etched to include a cavity two adjacent sides to align the sub-mount so that sub-mount is passively aligned once disposed into the cavity.Type: GrantFiled: August 18, 2014Date of Patent: August 16, 2016Assignee: CISCO TECHNOLOGY, INC.Inventors: Prakash Gothoskar, Vipulkumar Patel, Kalpendu Shastri, Rao V. Yelamarty
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Publication number: 20160170240Abstract: An optical modulator may include a lower waveguide, an upper waveguide, and a dielectric layer disposed therebetween. When a voltage potential is created between the lower and upper waveguides, these layers form a silicon-insulator-silicon capacitor (also referred to as SISCAP) guide that provides efficient, high-speed optical modulation of an optical signal passing through the modulator. In one embodiment, at least one of the waveguides includes a respective ridge portion aligned at a charge modulation region which may aid in confining the optical mode laterally (e.g., in the width direction) in the optical modulator. In another embodiment, ridge portions may be formed on both the lower and the upper waveguides. These ridge portions may be aligned in a vertical direction (e.g., a thickness direction) so that ridges overlap which may further improve optical efficiency by centering an optical mode in the charge modulation region.Type: ApplicationFiled: April 8, 2014Publication date: June 16, 2016Applicant: CISCO TECHNOLOGY, INC.Inventors: Donald ADAMS, Prakash GOTHOSKAR, Vipulkumar PATEL, Mark WEBSTER
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Patent number: 9360688Abstract: An optical modulator may include a lower waveguide, an upper waveguide, and a dielectric layer disposed therebetween. In one embodiment, the lower waveguide may include a u-shaped region within an optical mode of the light passing through the optical modulator. By conforming the dielectric layer to the surfaces of the u-shaped region, the amount of area of the dielectric layer within a charge modulation region is increased relative to forming the dielectric layer on a single plane. Folding the dielectric layer in this manner may improve modulation efficiency. In one embodiment, the u-shaped region is formed by using ridge structures that extend from an upper surface of the lower waveguide towards the upper waveguide. To aid in lateral confinement of the optical mode, the dielectric layer may be deposited on one side surface of the ridge structures while a different dielectric material is deposited on the opposite side surface.Type: GrantFiled: April 28, 2014Date of Patent: June 7, 2016Assignee: Cisco Technology, Inc.Inventors: Vipulkumar Patel, Prakash Gothoskar, Sean Anderson
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Publication number: 20160147087Abstract: An optical modulator may include a leftmost waveguide, a rightmost waveguide, and a dielectric layer disposed therebetween. In one embodiment, the waveguides may be disposed on the same plane. When a voltage potential is created between the rightmost and leftmost waveguides, these layers form a silicon-insulator-silicon capacitor (also referred to as SISCAP) structure that provides efficient, high-speed optical modulation of an optical signal passing through the modulator. As opposed to a horizontal SISCAP structure where the dielectric layer is disposed between upper and lower waveguides, arranging the dielectric layer between waveguides disposed on the same plane results in a vertical SISCAP structure. In one embodiment, the leftmost and rightmost waveguide are both made from crystalline silicon.Type: ApplicationFiled: January 28, 2016Publication date: May 26, 2016Inventors: Vipulkumar PATEL, Prakash GOTHOSKAR
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Patent number: 9343450Abstract: A wafer scale implementation of an opto-electronic transceiver assembly process utilizes a silicon wafer as an optical reference plane and platform upon which all necessary optical and electronic components are simultaneously assembled for a plurality of separate transceiver modules. In particular, a silicon wafer is utilized as a “platform” (interposer) upon which all of the components for a multiple number of transceiver modules are mounted or integrated, with the top surface of the silicon interposer used as a reference plane for defining the optical signal path between separate optical components. Indeed, by using a single silicon wafer as the platform for a large number of separate transceiver modules, one is able to use a wafer scale assembly process, as well as optical alignment and testing of these modules.Type: GrantFiled: May 13, 2014Date of Patent: May 17, 2016Assignee: CISCO TECHNOLOGY, INC.Inventors: Kalpendu Shastri, Vipulkumar Patel, Mark Webster, Prakash Gothoskar, Ravinder Kachru, Soham Pathak, Rao V. Yelamarty, Thomas Daugherty, Bipin Dama, Kaushik Patel, Kishor Desai
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Patent number: 9310629Abstract: An optical modulator may include a leftmost waveguide, a rightmost waveguide, and a dielectric layer disposed therebetween. In one embodiment, the waveguides may be disposed on the same plane. When a voltage potential is created between the rightmost and leftmost waveguides, these layers form a silicon-insulator-silicon capacitor (also referred to as SISCAP) structure that provides efficient, high-speed optical modulation of an optical signal passing through the modulator. As opposed to a horizontal SISCAP structure where the dielectric layer is disposed between upper and lower waveguides, arranging the dielectric layer between waveguides disposed on the same plane results in a vertical SISCAP structure. In one embodiment, the leftmost and rightmost waveguide are both made from crystalline silicon.Type: GrantFiled: April 30, 2014Date of Patent: April 12, 2016Assignee: Cisco Technology, Inc.Inventors: Vipulkumar Patel, Prakash Gothoskar
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Publication number: 20160050019Abstract: Embodiments described herein describe a sub-mount that is etched to include respective cavities with at least two adjacent sides that align optical filters and a mirror. Moreover, the cavities are arranged on the sub-mount such that when the filters and mirror are disposed in the cavities, they align in a manner that enables the performance of a multiplexing or demultiplexing function as part of, for example, a zigzag multiplexer/demultiplexer. In one embodiment, the filters and mirrors are aligned passively rather than actively. The sub-mount may then be placed on a substrate that includes other components of a ROSA or TOSA. In one embodiment, the substrate is also etched to include a cavity two adjacent sides to align the sub-mount so that sub-mount is passively aligned once disposed into the cavity.Type: ApplicationFiled: August 18, 2014Publication date: February 18, 2016Inventors: Prakash GOTHOSKAR, Vipulkumar PATEL, Kalpendu SHASTRI, Rao V. YELAMARTY
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Publication number: 20150212386Abstract: An optical modulator may include a leftmost waveguide, a rightmost waveguide, and a dielectric layer disposed therebetween. In one embodiment, the waveguides may be disposed on the same plane. When a voltage potential is created between the rightmost and leftmost waveguides, these layers form a silicon-insulator-silicon capacitor (also referred to as SISCAP) structure that provides efficient, high-speed optical modulation of an optical signal passing through the modulator. As opposed to a horizontal SISCAP structure where the dielectric layer is disposed between upper and lower waveguides, arranging the dielectric layer between waveguides disposed on the same plane results in a vertical SISCAP structure. In one embodiment, the leftmost and rightmost waveguide are both made from crystalline silicon.Type: ApplicationFiled: April 30, 2014Publication date: July 30, 2015Inventors: Vipulkumar PATEL, Prakash GOTHOSKAR
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Publication number: 20150212344Abstract: An optical modulator may include a lower waveguide, an upper waveguide, and a dielectric layer disposed therebetween. In one embodiment, the lower waveguide may include a u-shaped region within an optical mode of the light passing through the optical modulator. By conforming the dielectric layer to the surfaces of the u-shaped region, the amount of area of the dielectric layer within a charge modulation region is increased relative to forming the dielectric layer on a single plane. Folding the dielectric layer in this manner may improve modulation efficiency. In one embodiment, the u-shaped region is formed by using ridge structures that extend from an upper surface of the lower waveguide towards the upper waveguide. To aid in lateral confinement of the optical mode, the dielectric layer may be deposited on one side surface of the ridge structures while a different dielectric material is deposited on the opposite side surface.Type: ApplicationFiled: April 28, 2014Publication date: July 30, 2015Applicant: CISCO TECHNOLOGY, INC.Inventors: Vipulkumar PATEL, Prakash GOTHOSKAR, Sean ANDERSON
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Publication number: 20140362457Abstract: An arrangement for improving adhesive attachment of micro-components in an assembly utilizes a plurality of parallel-disposed slots formed in the top surface of the substrate used to support the micro-components. The slots are used to control the flow and “shape” of an adhesive “dot” so as to quickly and accurately attach a micro-component to the surface of a substrate. The slots are formed (preferably, etched) in the surface of the substrate in a manner that lends itself to reproducible accuracy from one substrate to another. Other slots (“channels”) may be formed in conjunction with the bonding slots so that extraneous adhesive material will flow into these channels and not spread into unwanted areas.Type: ApplicationFiled: July 15, 2014Publication date: December 11, 2014Inventors: Mary NADEAU, Vipulkumar PATEL, Prakash GOTHOSKAR, John FANGMAN, John Matthew FANGMAN, Mark WEBSTER
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Patent number: 8836100Abstract: An arrangement for improving adhesive attachment of micro-components in an assembly utilizes a plurality of parallel-disposed slots formed in the top surface of the substrate used to support the micro-components. The slots are used to control the flow and “shape” of an adhesive “dot” so as to quickly and accurately attach a micro-component to the surface of a substrate. The slots are formed (preferably, etched) in the surface of the substrate in a manner that lends itself to reproducible accuracy from one substrate to another. Other slots (“channels”) may be formed in conjunction with the bonding slots so that extraneous adhesive material will flow into these channels and not spread into unwanted areas.Type: GrantFiled: November 29, 2010Date of Patent: September 16, 2014Assignee: Cisco Technology, Inc.Inventors: Mary Nadeau, Vipulkumar Patel, Prakash Gothoskar, John Fangman, John Matthew Fangman, Mark Webster
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Publication number: 20140248723Abstract: A wafer scale implementation of an opto-electronic transceiver assembly process utilizes a silicon wafer as an optical reference plane and platform upon which all necessary optical and electronic components are simultaneously assembled for a plurality of separate transceiver modules. In particular, a silicon wafer is utilized as a “platform” (interposer) upon which all of the components for a multiple number of transceiver modules are mounted or integrated, with the top surface of the silicon interposer used as a reference plane for defining the optical signal path between separate optical components. Indeed, by using a single silicon wafer as the platform for a large number of separate transceiver modules, one is able to use a wafer scale assembly process, as well as optical alignment and testing of these modules.Type: ApplicationFiled: May 13, 2014Publication date: September 4, 2014Applicant: Cisco Technology, Inc.Inventors: Kalpendu SHASTRI, Vipulkumar PATEL, Mark WEBSTER, Prakash GOTHOSKAR, Ravinder KACHRU, Soham PATHAK, Rao V. YELAMARTY, Thomas DAUGHERTY, Bipin DAMA, Kaushik PATEL, Kishor DESAI