Abstract: A method for automatic correction of nonvolatile memory in information handling systems includes storing ECC data for a compressed BIOS firmware. The ECC data are used to identify and correct error bits in the compressed BIOS firmware. The discovered error bits are recorded in the nonvolatile memory and accessed for a faster correction method for the compressed BIOS firmware than using the ECC data on subsequent attempts.

Abstract: An information handling system and method performs Unified Extensible Firmware Interface (UEFI) interception and pre-processing of data associated with block input/output (I/O) commands targeting encrypted storage devices. A UEFI interceptor block (IB) I/O driver intercepts each block I/O command targeting block addresses on a storage device and identifies whether any of the target block addresses is encrypted. In response to identifying an encrypted block address among the target block addresses, the UEFI IB I/O driver forwards data associated with the encrypted block address to an encryption-decryption module to perform one of an encryption and a decryption of the data. Final handling of the block I/O command is performed using a block I/O driver chained to the UEFI IB I/O driver. Data associated with I/O commands targeting encrypted block addresses is first processed by the encryption-decryption module before final handling of the I/O command is performed by the block I/O driver.

Abstract: A heuristic learning algorithm uses an ALS to determine display brightness settings based on a stored response curve for display brightness for a user. When the user overrides the response curve value for display brightness at a given ALS output, the display brightness setting based on the user input is used to modify the response curve for the ALS output to lesser extent than the user input. Over time the response curve will approach desired user settings for each value of the ALS output.

Abstract: A method for automatic correction of nonvolatile memory in information handling systems includes storing ECC data for a compressed BIOS firmware. The ECC data are used to identify and correct error bits in the compressed BIOS firmware. The discovered error bits may be recorded in the nonvolatile memory and accessed for a faster correction method for the compressed BIOS firmware than using the ECC data on subsequent attempts.

Abstract: A DBMS optimizer generates a first query plan based on a first set of configuration parameters. The first query plan is executed in test mode one or more times. A first query object corresponding to the first query plan is created. The first query object includes the execution time of the first query plan. When the optimizer determines a first query plan is generated, a second query plan is generated based on a second set of configuration parameters. The second query plan is executed in test mode one or more times. A second query object corresponding to the second query plan is created. The second query object includes the execution time of the second query plan. Execution times of the first query plan and the second query plan are compared. The query plan with the shortest execution time is set as current query execution plan.

Abstract: A notch filter including an inductor-capacitor tuning circuit is disclosed. The inductor-capacitor tuning circuit may determine a frequency response of the notch filter in accordance with an associated resonant frequency. In some exemplary embodiments, the inductor-capacitor circuit may include a differential inductor divided at a symmetry point and a variable capacitor coupled to the differential inductor at the symmetry point.

Abstract: Methods and systems for platform configuration management may use a platform configuration register (PCR) stored on a trusted platform module (TPM) included with an information handling system. A basic input/output system (BIOS) may include instructions to generate a first PCR value based on BIOS settings while a user is operating the BIOS. When the first PCR value indicates a change from a previous PCR value stored in the PCR, an alert may be displayed to the user and sent to a network administrator. The BIOS may display an indication of a mapping of BIOS settings to the first PCR value.

Abstract: A power generation system (1) comprises a housing (3) which at least partly houses a turbine rotor (6) a shaft (4) and a electrical generator arrangement. The system further comprises an inlet guide vane arrangement (16) and an outlet stay vane arrangement (20) which are each detachably attached to the housing (3). The housing (3) comprises two parts (24, 25) that are releasably attached to one another such that the two parts (24, 25) of the housing (3) can be at least partly separated from one another to permit access to the turbine rotor (6) and the electrical generator system.

Abstract: Disclosed is a circuit having a differential stage comprising a pair or transistors. The transistors are biased by respective bias transistors. Each bias transistor has a respective feedback network configured to reduce transconductance of the bias transistor, to increase a gain of the differential stage.

Abstract: An information handling system and method performs Unified Extensible Firmware Interface (UEFI) interception and pre-processing of data associated with block input/output (I/O) commands targeting encrypted storage devices. A UEFI interceptor block (IB) I/O driver intercepts each block I/O command targeting block addresses on a storage device and identifies whether any of the target block addresses is encrypted. In response to identifying an encrypted block address among the target block addresses, the UEFI IB I/O driver forwards data associated with the encrypted block address to an encryption-decryption module to perform one of an encryption and a decryption of the data. Final handling of the block I/O command is performed using a block I/O driver chained to the UEFI IB I/O driver. Data associated with I/O commands targeting encrypted block addresses is first processed by the encryption-decryption module before final handling of the I/O command is performed by the block I/O driver.

Abstract: A method and apparatus for linearizing a baseband filter are provided. The apparatus is configured to, via a first conducting module, receive a first current signal. The apparatus is further configured to, via a converting module, receive a second current signal, generate a voltage signal based on the second current signal, and apply the voltage signal to the first conducting module. An amount of the second current signal received by the converting module is based on an amount of the first current signal flowing through the first conducting module. The apparatus is also configured to, via a second conducting module, control an output current signal based on the voltage signal. The output current signal is controlled to be a linear replica of the first current signal for in-band frequencies.

Abstract: Apparatus includes: a mixer configured to mix local a oscillator signal with a baseband signal and output a radio frequency (RF) signal; a first load coupled to the mixer and tuned to an operating frequency; and a second load coupled to the mixer and tuned to a predetermined multiple of the operating frequency.

Abstract: An information handling system and method performs Unified Extensible Firmware Interface (UEFI) interception and pre-processing of data associated with block input/output (I/O) commands targeting encrypted storage devices. A UEFI interceptor block (IB) I/O driver intercepts each block I/O command targeting block addresses on a storage device and identifies whether any of the target block addresses is encrypted. In response to identifying an encrypted block address among the target block addresses, the UEFI IB I/O driver forwards data associated with the encrypted block address to an encryption-decryption module to perform one of an encryption and a decryption of the data. Final handling of the block I/O command is performed using a block I/O driver chained to the UEFI IB I/O driver. Data associated with I/O commands targeting encrypted block addresses is first processed by the encryption-decryption module before final handling of the I/O command is performed by the block I/O driver.

Abstract: A notch filter including an inductor-capacitor tuning circuit is disclosed. The inductor-capacitor tuning circuit may determine a frequency response of the notch filter in accordance with an associated resonant frequency. In some exemplary embodiments, the inductor-capacitor circuit may include a differential inductor divided at a symmetry point and a variable capacitor coupled to the differential inductor at the symmetry point.

Abstract: Disclosed is a circuit having a differential stage comprising a pair or transistors. The transistors are biased by respective bias transistors. Each bias transistor has a respective feedback network configured to reduce transconductance of the bias transistor, to increase a gain of the differential stage.

Abstract: Apparatus includes: a mixer configured to mix local a oscillator signal with a baseband signal and output a radio frequency (RF) signal; a first load coupled to the mixer and tuned to an operating frequency; and a second load coupled to the mixer and tuned to a predetermined multiple of the operating frequency.

Abstract: A method and apparatus for linearizing a baseband filter are provided. The apparatus is configured to, via a first conducting module, receive a first current signal. The apparatus is further configured to, via a converting module, receive a second current signal, generate a voltage signal based on the second current signal, and apply the voltage signal to the first conducting module. An amount of the second current signal received by the converting module is based on an amount of the first current signal flowing through the first conducting module. The apparatus is also configured to, via a second conducting module, control an output current signal based on the voltage signal. The output current signal is controlled to be a linear replica of the first current signal for in-band frequencies.

Abstract: A system (1) to generate electricity from a fluid flowing through a pipeline. The system comprises a mounting arrangement to mount the system in a pipeline. The system comprises an elongate shaft (4), a turbine rotor (6), which is operable to rotate about the elongate axis of the shaft (4) when fluid in the pipeline acts on the turbine rotor (6). The system further comprises an electrical generator arrangement with a first part incorporating at least one magnet (12) and a second part incorporating at least one winding (14). One part of the generator arrangement is mounted to the turbine rotor (6) and the other part of the generator arrangement is mounted to a stator element (13) which is positioned adjacent the turbine rotor (6). The system further comprises a housing (3) which at least partly houses the turbine rotor (6), the shaft (4) and the electrical generator arrangement.

Abstract: Disclosed is circuitry for operating a switch which sees high voltage swings across its source, gate, drain, and bulk terminals. The circuitry generates one or more bias voltages in proportion to an input voltage swing. The one or more bias voltages may be used to bias the gate and bulk terminals to provide reliable and improved turn OFF performance in the switch.

Abstract: A method for drawing a line having a gradient opacity across a width of the line includes receiving a path for rendering the line in a user interface, and rendering, by a computing device, a plurality of composite lines on a user interface along the path to form the line. The composite lines of the plurality of composite lines have different widths have an opacity, and are multilayered along the path. The method further includes centering, by the computing device, longitudinal-centers of the plurality of composite lines with a center of the path. The opacity of the plurality of composite lines is additive across portions of the width of the line to form the gradient opacity.