Abstract: A method of depositing a silicon-containing material is disclosed. Some embodiments of the disclosure provide films which fill narrow CD features without a seam or void. Some embodiments of the disclosure provide films which form conformally on features with wider CD. Embodiments of the disclosure also provide superior quality films with low roughness, low defects and advantageously low deposition rates.

Abstract: Processing methods disclosed herein comprise forming a nucleation layer and a flowable chemical vapor deposition (FCVD) film on a substrate surface by exposing the substrate surface to a silicon-containing precursor and a reactant. By controlling at least one of a precursor/reactant pressure ratio, a precursor/reactant flow ratio and substrate temperature formation of miniature defects is minimized. Controlling at least one of the process parameters may reduce the number of miniature defects. The FCVD film can be cured by any suitable curing process to form a smooth FCVD film.

Abstract: Implementations disclosed herein generally provide a lift pin that can improve the deposition rate and uniform film thickness above lift pin areas. In one implementation, the lift pin includes a first end coupling to a shaft, the first end having a pin head, and the pin head having a top surface, wherein the top surface is planar and flat, and a second end coupling to the shaft, the second end having a flared portion, wherein the flared portion has an outer surface extended along a direction that is at an angle of about 110° to about 140° with respect to a longitudinal axis of the lift pin.

Abstract: A method of depositing a silicon-containing material is disclosed. Some embodiments of the disclosure provide films which fill narrow CD features without a seam or void. Some embodiments of the disclosure provide films which form conformally on features with wider CD. Embodiments of the disclosure also provide superior quality films with low roughness, low defects and advantageously low deposition rates.

Abstract: The present disclosure generally relate to thin films incorporating high aspect ratio feature definitions and methods for forming the same. As gate height increases, 3D NAND gate stacks are subject to higher aspect ratio etching. Due to the current limitations of etching techniques, the vertical etch profile typically tapers as the depth into the gate stack increases. The inventors have devised a unique deposition scheme that compensates for etch performance degradation in deep trenches by a novel plasma-enhanced chemical vapor deposition (PECVD) film deposition method. The inventors have found that by grading various properties (e.g., refractive index, stress of the film, dopant concentration in the film) of the as-deposited films (e.g., silicon nitride) a more uniform etch profile can be achieved by compensating for variations in both dry and wet etch rates.

Abstract: Methods for forming a smooth ultra-thin flowable CVD film by using a surface treatment on a substrate surface before flowable CVD film deposition improves the uniformity and overall film smoothness. The flowable CVD film can be cured by any suitable curing process to form a smooth flowable CVD film.

Abstract: A method of depositing a silicon-containing material is disclosed. Some embodiments of the disclosure provide films which fill narrow CD features without a seam or void. Some embodiments of the disclosure provide films which form conformally on features with wider CD. Embodiments of the disclosure also provide superior quality films with low roughness, low defects and advantageously low deposition rates.

Abstract: Embodiments disclosed herein relate to cluster tools for forming and filling trenches in a substrate with a flowable dielectric material. In one or more embodiments, a cluster tool for processing a substrate contains a load lock chamber, a first vacuum transfer chamber coupled to the load lock chamber, a second vacuum transfer chamber, a cooling station disposed between the first vacuum transfer chamber and the second vacuum transfer chamber, a factory interface coupled to the load lock chamber, a plurality of first processing chambers coupled to the first vacuum transfer chamber, wherein each of the first processing chambers is a deposition chamber capable of performing a flowable layer deposition, and a plurality of second processing chambers coupled to the second vacuum transfer chamber, wherein each of the second processing chambers is a plasma chamber capable of performing a plasma curing process.

Abstract: Provided are methods of depositing a film in high aspect ratio (AR) structures with small dimensions. The method provides flowable deposition for seamless gap-fill, UV cure for increasing film density, film conversion to silicon oxide at low temperature, and film densification by low temperature inductively coupled plasma (ICP) treatment (<400° C.).

Abstract: Implementations of the present disclosure provide methods for processing substrates in a processing chamber. In one implementation, the method includes (a) depositing a dielectric layer on a first substrate at a first chamber pressure using a first high-frequency RF power, (b) depositing sequentially a dielectric layer on N substrates subsequent to the first substrate at a second chamber pressure, wherein N is an integral number of 5 to 10, and wherein depositing each substrate of N substrates comprises using a second high-frequency RF power that has a power density of about 0.21 W/cm2 to about 0.35 W/cm2 lower than that of the first high-frequency RF power, (c) performing a chamber cleaning process without the presence of a substrate, and (d) repeating (a) to (c).

Abstract: Embodiments disclosed herein relate to methods for forming memory devices, and more specifically to improved methods for forming a dielectric encapsulation layer over a memory material in a memory device. In one embodiment, the method includes thermally depositing a first material over a memory material at a temperature less than the temperature of the thermal budget of the memory material, exposing the first material to nitrogen plasma to incorporate nitrogen in the first material, and repeating the thermal deposition and nitrogen plasma operations to form a hermetic, conformal dielectric encapsulation layer over the memory material. Thus, a memory device having a hermetic, conformal dielectric encapsulation layer over the memory material is formed.

Abstract: Methods for forming a smooth ultra-thin flowable CVD film by using a surface treatment on a substrate surface before flowable CVD film deposition improves the uniformity and overall film smoothness. The flowable CVD film can be cured by any suitable curing process to form a smooth flowable CVD film.

Abstract: Embodiments disclosed herein relate to cluster tools for forming and filling trenches in a substrate with a flowable dielectric material. In one or more embodiments, a cluster tool for processing a substrate contains a load lock chamber, a first vacuum transfer chamber coupled to the load lock chamber, a second vacuum transfer chamber, a cooling station disposed between the first vacuum transfer chamber and the second vacuum transfer chamber, a factory interface coupled to the load lock chamber, a plurality of first processing chambers coupled to the first vacuum transfer chamber, wherein each of the first processing chambers is a deposition chamber capable of performing a flowable layer deposition, and a plurality of second processing chambers coupled to the second vacuum transfer chamber, wherein each of the second processing chambers is a plasma chamber capable of performing a plasma curing process.

Abstract: Implementations disclosed herein relate to methods for forming and filling trenches in a substrate with a flowable dielectric material. In one implementation, the method includes subjecting a substrate having at least one trench to a deposition process to form a flowable layer over a bottom surface and sidewall surfaces of the trench in a bottom-up fashion until the flowable layer reaches a predetermined deposition thickness, subjecting the flowable layer to a first curing process, the first curing process being a UV curing process, subjecting the UV cured flowable layer to a second curing process, the second curing process being a plasma or plasma-assisted process, and performing sequentially and repeatedly the deposition process, the first curing process, and the second curing process until the plasma cured flowable layer fills the trench and reaches a predetermined height over a top surface of the trench.

Abstract: Embodiments disclosed herein generally relate to systems and methods to prevent free radical damage to sensitive components in a process chamber and optimizing flow profiles. The processing chamber utilizes a cover substrate on lift pins and an inert bottom purge flow to shield the substrate support from halogen reactants. During a clean process, the cover substrate and the purge flow restricts halogen reactants from contacting the substrate support. The method of cleaning includes placing a cover substrate on a plurality of lift pins that extend through a substrate support in a processing chamber, raising the cover substrate via the lift pins to expose a space between the cover substrate and the substrate support, supplying a halogen containing gas into the processing chamber, supplying a second gas through an opening in the processing chamber, and flowing the second gas through the space between the cover substrate and the substrate support.

Abstract: Implementations of the present disclosure provide methods for processing substrates in a processing chamber. In one implementation, the method includes (a) depositing a dielectric layer on a first substrate at a first chamber pressure using a first high-frequency RF power, (b) depositing sequentially a dielectric layer on N substrates subsequent to the first substrate at a second chamber pressure, wherein N is an integral number of 5 to 10, and wherein depositing each substrate of N substrates comprises using a second high-frequency RF power that has a power density of about 0.21 W/cm2 to about 0.35 W/cm2 lower than that of the first high-frequency RF power, (c) performing a chamber cleaning process without the presence of a substrate, and (d) repeating (a) to (c).

Abstract: Aspects disclosed herein relate to methods of depositing pure silicon oxide on a substrate using Octamethylcyclotetrasiloxane (OMCTS) precursor. In one aspect, the method generally includes positioning a substrate in a processing chamber, introducing an oxygen-containing gas into the processing chamber, introducing OMCTS precursor into the processing chamber, and reacting the oxygen-containing gas and the OMCTS precursor to remove carbon and deposit pure silicon oxide on the substrate.

Abstract: Implementations described herein generally relate to the fabrication of integrated circuits and particularly to the deposition of a boron-doped amorphous silicon (a-Si) layers on a semiconductor substrate. In one implementation, a method is provided. The method comprises generating a pressure within a processing volume between 2 Torr and 60 Torr. The method further comprises heating a substrate in the processing volume to a temperature between 300 degrees Celsius and 550 degrees Celsius. The method further comprises flowing a silane-containing gas mixture into the processing volume having the substrate positioned therein. The method further comprises flowing a borane-containing gas mixture into the processing volume having the substrate positioned therein and depositing a boron-doped amorphous silicon layer on the substrate.

Abstract: Implementations disclosed herein generally provide a lift pin that can improve the deposition rate and uniform film thickness above lift pin areas. In one implementation, the lift pin includes a first end coupling to a shaft, the first end having a pin head, and the pin head having a top surface, wherein the top surface is planar and flat, and a second end coupling to the shaft, the second end having a flared portion, wherein the flared portion has an outer surface extended along a direction that is at an angle of about 110° to about 140° with respect to a longitudinal axis of the lift pin.

Abstract: Implementations disclosed herein generally provide a lift pin that can improve the deposition rate and uniform film thickness above lift pin areas. In one implementation, the lift pin includes a first end coupling to a shaft, the first end having a pin head, and the pin head having a top surface, wherein the top surface is planar and flat, and a second end coupling to the shaft, the second end having a flared portion, wherein the flared portion has an outer surface extended along a direction that is at an angle of about 110° to about 140° with respect to a longitudinal axis of the lift pin.