Patents by Inventor Pranabes K. Pramanik

Pranabes K. Pramanik has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9669992
    Abstract: A mold includes a forming insert that includes an upper portion and a lower portion. The upper portion includes a sidewall segment and a heel segment extending from a bottom of the sidewall segment. The sidewall segment has a sidewall radius, and the heel segment has a heel radius that is less than the sidewall radius. The lower portion extends axially downward from the upper portion to define a base cavity. A forming base is positionable within the base cavity. The rim has a rim radius that is less than the heel radius and the step has a step radius that is less than the rim radius.
    Type: Grant
    Filed: July 21, 2015
    Date of Patent: June 6, 2017
    Assignee: Polyone Designed Structures and Solutions LLC
    Inventors: Loren F. Temple, Jr., Pranabes K. Pramanik
  • Patent number: 8866018
    Abstract: A thin laminate passive electrical device, such as, a capacitor, and a method of fabricating a thin laminate passive electrical device are provided. The passive electrical device includes two conductors, for example, copper foil conductors, separated by a dielectric having a first layer of a first material having a softening point temperature greater than a first temperature and a first layer of a second material having a softening point temperature less than the first temperature. The first temperature may be at least 150 degrees C. or higher. By providing a first layer having a higher softening point material, shorting across the conductors, that can be promoted by the fabrication process, is prevented. Methods of fabricating passive electrical devices are also disclosed.
    Type: Grant
    Filed: January 12, 2009
    Date of Patent: October 21, 2014
    Assignee: Oak-Mitsui Technologies LLC
    Inventors: Pranabes K. Pramanik, Yuji Kageyama, Fujio Kuwako, Jin Hyun Hwang
  • Publication number: 20140170344
    Abstract: A multi-layer sheet structure is provided. The multi-layer sheet structure comprises at least one structural layer comprising high impact polystyrene and at least one moisture barrier layer comprising greater than about 30 percent cyclic olefin copolymer by weight of the at least one moisture barrier layer.
    Type: Application
    Filed: February 18, 2013
    Publication date: June 19, 2014
    Applicant: SPARTECH CORPORATION
    Inventors: Pranabes K. Pramanik, Gregory M. Dixon
  • Publication number: 20120241352
    Abstract: A container includes a body that includes a sidewall and a heel extending from a bottom of the sidewall. The sidewall defines a cavity therein. The sidewall has a sidewall radius, and the heel has a heel radius that is less than the sidewall radius. A base is coupled to the heel. The container is molded from a multi-layer sheet structure including a polypropylene composition that enables the body to be substantially rigid while the base is being punctured by a puncturing device.
    Type: Application
    Filed: September 1, 2011
    Publication date: September 27, 2012
    Inventors: Pranabes K. Pramanik, Loren F. Temple, JR.
  • Publication number: 20120244362
    Abstract: A multi-layer sheet structure includes, in an exemplary embodiment, a barrier layer having a first side and a second side, at least one thermoplastic layer on the first side of the barrier layer, and at least one thermoplastic layer on the second side of the barrier layer. A cup shaped container may be molded from the multi-layer sheet structure.
    Type: Application
    Filed: September 1, 2011
    Publication date: September 27, 2012
    Inventors: Pranabes K. Pramanik, Jeffrey J. Berg
  • Patent number: 7862900
    Abstract: The invention concerns multilayered constructions useful in forming capacitors and resistors, which may be used in the manufacture of printed circuit boards and microelectronic devices. A thermosetting polymer layer or layers are attached directly onto a heat resistant film layer, specifically on the side(s) of the heat resistant film to be attached to an electrically conductive layer having an electrical resistance material layer thereon. Attaching the adhesive to the heat resistant film rather than the electrically conductive layer streamlines the manufacturing process, particularly in the formation of the electrical resistance material layer onto the electrically conductive layer. This also results in better precision and uniformity of the multilayered construction.
    Type: Grant
    Filed: August 26, 2009
    Date of Patent: January 4, 2011
    Assignee: Oak-Mitsui Inc.
    Inventors: John A. Andresakis, Pranabes K. Pramanik
  • Publication number: 20100175914
    Abstract: A thin laminate passive electrical device, such as, a capacitor, and a method of fabricating a thin laminate passive electrical device are provided. The passive electrical device includes two conductors, for example, copper foil conductors, separated by a dielectric having a first layer of a first material having a softening point temperature greater than a first temperature and a first layer of a second material having a softening point temperature less than the first temperature. The first temperature may be at least 150 degrees C. or higher. By providing a first layer having a higher softening point material, shorting across the conductors, that can be promoted by the fabrication process, is prevented. Methods of fabricating passive electrical devices are also disclosed.
    Type: Application
    Filed: January 12, 2009
    Publication date: July 15, 2010
    Applicant: OAK-MITSUI TECHNOLOGIES LLC
    Inventors: Pranabes K. PRAMANIK, Yuji KAGEYAMA, Fujio KUWAKO, Jin Hyun HWANG
  • Patent number: 7672113
    Abstract: Polymer-ceramic composite materials for use in the formation of capacitors, which materials exhibit very low changes in temperature coefficient of capacitance (TCC) in response to changes in temperature within the range of from about ?55° C. to about 125° C. Specifically, these capacitor materials have a change in TCC ranging from about ?5% to about +5%, in response to changes in temperature within the desired temperature range. The inventive composite materials comprise a blend of a polymer component and ferroelectric ceramic particles, wherein the polymer component includes at least one epoxy-containing polymer, and at least one polymer having epoxy-reactive groups. The inventive polymer-ceramic composite materials have excellent mechanical properties such as improved peel strength and lack of brittleness, electrical properties such as high dielectric constant, and improved processing characteristics.
    Type: Grant
    Filed: September 14, 2007
    Date of Patent: March 2, 2010
    Assignee: Oak-Mitsui, Inc.
    Inventors: Pranabes K. Pramanik, Jaclyn Radewitz, Kazuhiro Yamazaki
  • Publication number: 20090314531
    Abstract: The invention concerns a method of making multilayered constructions useful in forming capacitors and resistors, which may be used in the manufacture of printed circuit boards and microelectronic devices. According to the inventive method, a thermosetting polymer layer or layers are attached directly onto a heat resistant film layer, specifically on the side(s) of the heat resistant film to be attached to an electrically conductive layer having an electrical resistance material layer thereon. Attaching the adhesive to the heat resistant film rather than the electrically conductive layer streamlines the manufacturing process, particularly in the formation of the electrical resistance material layer onto the electrically conductive layer. This also results in better precision and uniformity of the multilayered construction.
    Type: Application
    Filed: August 26, 2009
    Publication date: December 24, 2009
    Inventors: JOHN A. ANDRESAKIS, Pranabes K. Pramanik
  • Patent number: 7596842
    Abstract: The invention concerns a method of making multilayered constructions useful in forming capacitors and resistors, which may be used in the manufacture of printed circuit boards and microelectronic devices. According to the inventive method, a thermosetting polymer layer or layers are attached directly onto a heat resistant film layer, specifically on the side(s) of the heat resistant film to be attached to an electrically conductive layer having an electrical resistance material layer thereon. Attaching the adhesive to the heat resistant film rather than the electrically conductive layer streamlines the manufacturing process, particularly in the formation of the electrical resistance material layer onto the electrically conductive layer. This also results in better precision and uniformity of the multilayered construction.
    Type: Grant
    Filed: February 22, 2005
    Date of Patent: October 6, 2009
    Assignee: Oak-Mitsui Inc.
    Inventors: John A. Andresakis, Pranabes K. Pramanik
  • Publication number: 20090073636
    Abstract: Polymer-ceramic composite materials for use in the formation of capacitors, which materials exhibit very low changes in temperature coefficient of capacitance (TCC) in response to changes in temperature within the range of from about ?55° C. to about 125° C. Specifically, these capacitor materials have a change in TCC ranging from about ?5 % to about +5 %, in response to changes in temperature within the desired temperature range. The inventive composite materials comprise a blend of a polymer component and ferroelectric ceramic particles, wherein the polymer component includes at least one epoxy-containing polymer, and at least one polymer having epoxy-reactive groups. The inventive polymer-ceramic composite materials have excellent mechanical properties such as improved peel strength and lack of brittleness, electrical properties such as high dielectric constant, and improved processing characteristics.
    Type: Application
    Filed: September 14, 2007
    Publication date: March 19, 2009
    Inventors: PRANABES K. PRAMANIK, Jaclyn Radewitz, Kazuhiro Yamazaki
  • Publication number: 20080226815
    Abstract: The invention concerns multilayered structures useful for forming capacitors, which may be embedded within printed circuit boards or other microelectronic devices. The multilayered structure comprises a pair of parallel electrically conductive layers separated by a pair of dielectric layers and a central polymerizable layer. Each of the dielectric layers and the central layer may include a filler. Capacitors formed from the multilayered structures of the invention exhibit excellent short circuit resistance as well as excellent void resistance.
    Type: Application
    Filed: May 23, 2008
    Publication date: September 18, 2008
    Inventor: PRANABES K. PRAMANIK
  • Patent number: 7413815
    Abstract: The invention concerns multilayered structures useful for forming capacitors, which may be embedded within printed circuit boards or other microelectronic devices. The multilayered structure comprises a pair of parallel electrically conductive layers separated by a pair of dielectric layers and a central polymerizable layer. Each of the dielectric layers and the central layer may include a filler. Capacitors formed from the multilayered structures of the invention exhibit excellent short circuit resistance as well as excellent void resistance.
    Type: Grant
    Filed: February 19, 2004
    Date of Patent: August 19, 2008
    Assignee: Oak-Mitsui Inc.
    Inventor: Pranabes K. Pramanik
  • Patent number: 7192654
    Abstract: The invention concerns multilayered constructions useful for forming resistors and capacitors, for the manufacture of printed circuit boards or other microelectronic devices. The multilayered constructions comprise sequentially attached layers comprising: a first electrically conductive layer, a first thermosetting polymer layer, a heat resistant film layer, a second thermosetting polymer layer, and a nickel-phosphorus electrical resistance material layer electroplated onto a second electrically conductive layer.
    Type: Grant
    Filed: February 22, 2005
    Date of Patent: March 20, 2007
    Assignees: Oak-Mitsui Inc., Ohmega Technologies Inc.
    Inventors: John A. Andresakis, Pranabes K. Pramanik, Bruce Mahler, Daniel Brandler