Abstract: An integrated circuit includes a first FET structure and a second FET structure, both of which being formed over a silicon substrate. The first FET structure includes a high-k material layer, a layer of a first workfunction material formed over the high-k material layer, a layer of a barrier material formed over the first workfunction material layer; and a layer of a gate fill material formed over the barrier material layer. The entirety of the barrier material layer and the gate fill material layer are formed above the first workfunction material layer. The second FET structure includes a layer of the high-k material, a layer of a second workfunction material formed over the high-k material layer, a low-resistance material layer formed over the second workfunction material layer and a layer of the barrier material formed over the low-resistance material layer.

Abstract: An integrated circuit includes a first FET structure and a second FET structure, both of which being formed over a silicon substrate. The first FET structure includes a high-k material layer, a layer of a first workfunction material formed over the high-k material layer, a layer of a barrier material formed over the first workfunction material layer; and a layer of a gate fill material formed over the barrier material layer. The entirety of the barrier material layer and the gate fill material layer are formed above the first workfunction material layer. The second FET structure includes a layer of the high-k material, a layer of a second workfunction material formed over the high-k material layer, a low-resistance material layer formed over the second workfunction material layer and a layer of the barrier material formed over the low-resistance material layer.

Abstract: A method for fabricating an integrated circuit includes forming a first layer of a workfunction material in a first trench of a plurality of trench structures formed over a silicon substrate, the first trench having a first length and forming a second layer of a workfunction material in a second trench, the second trench having a second length that is longer than the first length. The method further includes depositing a low-resistance fill material onto the integrated circuit to fill any unfilled trenches with the low-resistance fill material and etching the low resistance fill material, the first layer, and the second layer to re-expose a portion of each trench of the plurality of trenches, while leaving a portion of each of the first layer, the second layer, and the low-resistance fill material in place. Still further, the method includes depositing a gate fill material into each re-exposed trench portion.

Abstract: A method for fabricating an integrated circuit includes forming a first layer of a workfunction material in a first trench of a plurality of trench structures formed over a silicon substrate, the first trench having a first length and forming a second layer of a workfunction material in a second trench, the second trench having a second length that is longer than the first length. The method further includes depositing a low-resistance fill material onto the integrated circuit to fill any unfilled trenches with the low-resistance fill material and etching the low resistance fill material, the first layer, and the second layer to re-expose a portion of each trench of the plurality of trenches, while leaving a portion of each of the first layer, the second layer, and the low-resistance fill material in place. Still further, the method includes depositing a gate fill material into each re-exposed trench portion.