Patents by Inventor Prasad L. Sastry

Prasad L. Sastry has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6662285
    Abstract: A data processing system having a user configurable memory controller, one or more local block RAMs, one or more global block RAMs and a processor core can be configured in a single field programmable gate array (FPGA). The address depth of the global block RAMs and the number of wait states can be selected by a user, and they can be set either prior to configuration of the FPGA or programmed using instructions of the processor core. The number of wait states of the local block RAM is also user selectable. An algorithm that can optimize the address depth and the number of wait states to achieve a performance level is also disclosed. The present invention can be applied to designs having separate instruction and data sides.
    Type: Grant
    Filed: July 27, 2001
    Date of Patent: December 9, 2003
    Assignee: Xilinx, Inc.
    Inventors: Stephen M. Douglass, Prasad L. Sastry, Mehul R. Vashi, Robert Yin