Patents by Inventor Prasad N. Golla

Prasad N. Golla has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7606140
    Abstract: A distributed and disjoint forwarding and routing system and method operable with a routing element having a scalable cluster-based architecture, wherein the control plane and data plane are loosely-coupled for effectuating non-disruptive switchover in the event of a failure. The routing element includes a partitionable data plane having one or more forwarding tables and a partitionable control plane having one or more routing tables operating under control of at least one routing protocol process. One or more update buffers are provided with respect to the forwarding and routing tables. A partitionable update agent module is disposed between the data and control planes for mediating the updating and coordination of the forward tables based on the routing tables.
    Type: Grant
    Filed: August 28, 2003
    Date of Patent: October 20, 2009
    Assignee: Alcatel Lucent
    Inventor: Prasad N. Golla
  • Patent number: 7298728
    Abstract: A scheduling system and method operable with a burst switching element wherein control information is provided to the switching element via a separate Burst Header that precedes data bursts on ingress data channels. In one embodiment, a series of scheduling determinations are made in a select order such that packet treatment (i.e., processing for transmission, buffering, or packet dropping) is optimized with respect to packet loss and available buffer space. In another embodiment, control information received in the Burst Headers is utilized to reserve output data channel bandwidth to future incoming data packets in a forward-looking scheduling mechanism.
    Type: Grant
    Filed: December 23, 2002
    Date of Patent: November 20, 2007
    Assignee: Alcatel Lucent
    Inventors: Prasad N. Golla, John Blanton, Gerard Damm, Dominique Verchere, CĂ©line Haardt, Farid Farahmand
  • Patent number: 7158510
    Abstract: A look-up table (LUT)-based arbitration (LTA) system and methodology for use in a network switch element. Input control signals generated by ingress and egress entities associated with a cross-connect matrix of the network switch element are encoded into address information that is used for interrogating a storage structure. Pre-computed arbitration results based on a select arbiter scheme are stored into fields associated with the storage structure. When a particular input combination is applied with respect to an arbitration iteration, a selected arbitration result is obtained by querying the appropriate field, which is then decoded into a corresponding selected entity for the arbitration iteration.
    Type: Grant
    Filed: February 14, 2002
    Date of Patent: January 2, 2007
    Assignee: Alcatel
    Inventors: Prasad N. Golla, Gerard Damm, John Blanton, Dominique Verchere
  • Patent number: 7023840
    Abstract: A scheduling system and methodology for use in a network switch element having multiserver, multiple-arbiter architecture. Ingress ports and egress ports coupled to the cross-connect fabric of the network element are provided with multiple ingress and egress arbiters, respectively, for effectuating an iterative arbitration strategy such as RGA or RG. Arbiter architectures include singe-arbiter-per-port; single-arbiter-per-server; multiple-arbiters-per-port; and multiple-arbiters-per-server arrangements, wherein the arbiters can be implemented using RRA, BTA, Flexible Ring, or any other arbiter technology. Depending on the iteration strategy, ingress arbiter architecture and egress arbiter architecture, a variety of iterative, multiserver-capable scheduling algorithms can be obtained, which scheduling algorithms can also be implemented in QoS-aware network nodes.
    Type: Grant
    Filed: January 28, 2002
    Date of Patent: April 4, 2006
    Assignee: Alcatel
    Inventors: Prasad N. Golla, Gerard Damm, John Blanton, Mei Yang, Dominique Verchere, Hakki Candan Cankaya, Yijun Xiong
  • Patent number: 7007123
    Abstract: A binary-tree-based arbitration system and methodology with attributes that approximate a Generalized Processor Sharing (GPS) scheme for rendering fairer service grants in an environment having a plurality of competing entities. Arbitration based on probabilistic control of arbiter nodes' behavior is set forth for alleviating the inherent unfairness of a binary tree arbiter (BTA). In one implementation, BTA flag direction probabilities are computed based on composite weighted functions that assign relative weights or priorities to such factors as queue sizes, queue ages, and service class parameters. Within this general framework, techniques for desynchronizing a binary tree's root node, shuffling techniques for mapping incoming service requests to the BTA's inputs, and multi-level embedded trees are described.
    Type: Grant
    Filed: March 28, 2002
    Date of Patent: February 28, 2006
    Assignee: Alcatel
    Inventors: Prasad N. Golla, Gerard Damm, Timochin Ozugur, John Blanton, Dominique Verchere
  • Publication number: 20040120276
    Abstract: A scheduling system and method operable with a burst switching element wherein control information is provided to the switching element via a separate Burst Header that precedes data bursts on ingress data channels. In one embodiment, a series of scheduling determinations are made in a select order such that packet treatment (i.e., processing for transmission, buffering, or packet dropping) is optimized with respect to packet loss and available buffer space. In another embodiment, control information received in the Burst Headers is utilized to reserve output data channel bandwidth to future incoming data packets in a forward-looking scheduling mechanism.
    Type: Application
    Filed: December 23, 2002
    Publication date: June 24, 2004
    Inventors: Prasad N. Golla, John Blanton, Gerard Damm, Dominique Verchere, Celine Haardt, Farid Farahmand
  • Publication number: 20030188065
    Abstract: A binary-tree-based arbitration system and methodology with attributes that approximate a Generalized Processor Sharing (GPS) scheme for rendering fairer service grants in an environment having a plurality of competing entities. Arbitration based on probabilistic control of arbiter nodes' behavior is set forth for alleviating the inherent unfairness of a binary tree arbiter (BTA). In one implementation, BTA flag direction probabilities are computed based on composite weighted functions that assign relative weights or priorities to such factors as queue sizes, queue ages, and service class parameters. Within this general framework, techniques for desynchronizing a binary tree's root node, shuffling techniques for mapping incoming service requests to the BTA's inputs, and multi-level embedded trees are described.
    Type: Application
    Filed: March 28, 2002
    Publication date: October 2, 2003
    Inventors: Prasad N. Golla, Gerard Damm, Timucin Ozugur, John Blanton, Dominique Verchere
  • Publication number: 20020176431
    Abstract: A scheduling system and methodology for use in a network switch element having multiserver, multiple-arbiter architecture. Ingress ports and egress ports coupled to the cross-connect fabric of the network element are provided with multiple ingress and egress arbiters, respectively, for effectuating an iterative arbitration strategy such as RGA or RG. Arbiter architectures include singe-arbiter-per-port; single-arbiter-per-server; multiple-arbiters-per-port; and multiple-arbiters-per-server arrangements, wherein the arbiters can be implemented using RRA, BTA, Flexible Ring, or any other arbiter technology. Depending on the iteration strategy, ingress arbiter architecture and egress arbiter architecture, a variety of iterative, multiserver-capable scheduling algorithms can be obtained, which scheduling algorithms can also be implemented in QoS-aware network nodes.
    Type: Application
    Filed: January 28, 2002
    Publication date: November 28, 2002
    Inventors: Prasad N. Golla, Gerard Damm, John Blanton, Mei Yang, Dominique Verchere, Hakki Candan Cankaya, Yijun Xiong