Patents by Inventor Prasad Nagaraja

Prasad Nagaraja has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11568323
    Abstract: Disclosed is an electronic device. The An electronic device including a storage, and a processor configured to perform convolution processing on target data and kernel data based on stride information that indicates an interval at which the kernel data is applied to the target data stored in the storage, in which the processor is further configured to divide the target data into a plurality of pieces of sub-data based on first stride information, perform the convolution processing on the plurality of pieces of sub-data and a plurality of pieces of sub-kernel data respectively corresponding to the plurality of pieces of sub-data based on second stride information that is different from the first stride information, and combine a plurality of processing results, the plurality of pieces of sub-kernel data are obtained by dividing the kernel data based on the first stride information, and the second stride information indicates that the interval at which the kernel data is applied to the target data is 1.
    Type: Grant
    Filed: May 16, 2018
    Date of Patent: January 31, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyoung-hoon Kim, Young-hwan Park, Dong-kwan Suh, Keshava Prasad Nagaraja, Dae-hyun Kim, Suk-jin Kim, Han-su Cho, Hyun-jung Kim
  • Patent number: 11113361
    Abstract: An electronic apparatus is provided. The electronic apparatus includes a storage storing object data and kernel data, and a processor including a plurality of processing elements arranged in a matrix formation, wherein the processor is configured to input corresponding first elements among a plurality of first elements included in the object data into processing elements arranged in a first row among the plurality of processing elements, and input a plurality of second elements included in the kernel data sequentially into the processing elements arranged in the first row to perform operations between the corresponding first elements and the plurality of second elements, to identify a depth in which a first element and a second element have a non-zero value, and to input the first element and the second element corresponding to the identified depth into a calculator included in each of the processing elements arranged in the first row to perform a convolution operation.
    Type: Grant
    Filed: March 7, 2019
    Date of Patent: September 7, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Younghwan Park, Kyounghoon Kim, Dongkwan Suh, Hansu Cho, Keshava Prasad Nagaraja, Sukjin Kim, Hyunjung Kim
  • Patent number: 11093439
    Abstract: A processor for performing deep learning is provided herein. The processor includes a processing element unit including a plurality of processing elements arranged in a matrix form including a first row of processing elements and a second row of processing elements. The processing elements are fed with filter data by a first data input unit which is connected to the first row processing elements. A second data input unit feeds target data to the processing elements. A shifter composed of registers feeds instructions to the processing elements. A controller in the processor controls the processing elements, the first data input unit and second data input unit to process the filter data and target data, thus providing sum of products (convolution) functionality.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: August 17, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyoung-hoon Kim, Young-hwan Park, Dong-kwan Suh, Keshava prasad Nagaraja, Suk-jin Kim, Han-su Cho, Hyun-jung Kim
  • Publication number: 20200272946
    Abstract: Disclosed is an electronic device. The An electronic device including a storage, and a processor configured to perform convolution processing on target data and kernel data based on stride information that indicates an interval at which the kernel data is applied to the target data stored in the storage, in which the processor is further configured to divide the target data into a plurality of pieces of sub-data based on first stride information, perform the convolution processing on the plurality of pieces of sub-data and a plurality of pieces of sub-kernel data respectively corresponding to the plurality of pieces of sub-data based on second stride information that is different from the first stride information, and combine a plurality of processing results, the plurality of pieces of sub-kernel data are obtained by dividing the kernel data based on the first stride information, and the second stride information indicates that the interval at which the kernel data is applied to the target data is 1.
    Type: Application
    Filed: May 16, 2018
    Publication date: August 27, 2020
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyoung-hoon KIM, Young-hwan PARK, Dong-kwan SUH, Keshava Prasad NAGARAJA, Dae-hyun KIM, Suk-jin KIM, Han-su CHO, Hyun-jung KIM
  • Publication number: 20190278828
    Abstract: An electronic apparatus is provided. The electronic apparatus includes a storage storing object data and kernel data, and a processor including a plurality of processing elements arranged in a matrix formation, wherein the processor is configured to input corresponding first elements among a plurality of first elements included in the object data into processing elements arranged in a first row among the plurality of processing elements, and input a plurality of second elements included in the kernel data sequentially into the processing elements arranged in the first row to perform operations between the corresponding first elements and the plurality of second elements, to identify a depth in which a first element and a second element have a non-zero value, and to input the first element and the second element corresponding to the identified depth into a calculator included in each of the processing elements arranged in the first row to perform a convolution operation.
    Type: Application
    Filed: March 7, 2019
    Publication date: September 12, 2019
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Younghwan PARK, Kyounghoon KIM, Dongkwan SUH, Hansu CHO, Keshava PRASAD NAGARAJA, Sukjin KIM, Hyunjung KIM
  • Publication number: 20190129885
    Abstract: A processor for performing deep learning is provided herein. The processor includes a processing element unit including a plurality of processing elements arranged in a matrix form including a first row of processing elements and a second row of processing elements. The processing elements are fed with filter data by a first data input unit which is connected to the first row processing elements. A second data input unit feeds target data to the processing elements. A shifter composed of registers feeds instructions to the processing elements. A controller in the processor controls the processing elements, the first data input unit and second data input unit to process the filter data and target data, thus providing sum of products (convolution) functionality.
    Type: Application
    Filed: September 27, 2018
    Publication date: May 2, 2019
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyoung-hoon KIM, Young-hwan PARK, Dong-kwan SUH, Keshava PRASAD NAGARAJA, Suk-jin KIM, Han-su CHO, Hyun-jung KIM
  • Publication number: 20190114542
    Abstract: An electronic apparatus and method thereof are provided for performing deep learning. The electronic apparatus includes a storage configured to store target data and kernel data; and a processor including a plurality of processing elements that are arranged in a matrix shape. The processor is configured to input, to each of the plurality of processing elements, a first non-zero element from among a plurality of first elements included in the target data, and sequentially input, to each of a plurality of first processing elements included in a first row from among the plurality of processing elements, a second non-zero element from among the plurality of elements included in the kernel data. Each of the plurality of first processing elements is configured to perform an operation between the input first non-zero element and the input second non-zero element, based on depth information of the first non-zero element and depth information of the second non-zero element.
    Type: Application
    Filed: July 10, 2018
    Publication date: April 18, 2019
    Inventors: Kyoung-hoon Kim, Young-hwan Park, Dong-kwan Suh, Keshava Prasad Nagaraja, Dae-hyun Kim, Suk-jin Kim, Han-su Cho, Hyun-jung Kim
  • Publication number: 20060132835
    Abstract: A method for communicating device settings from an application to a device driver, by storing the settings in a temporary file, and communicating the temporary file's name to the device driver. Application programming interfaces (APIs) of programming languages often provide access to only a subset of device settings. Fore example, Java and C APIs may provide access to the common printer (public devmode) settings but not to the optional and printer-model-specific (private devmode) settings. The method enables communication of device settings not included in the APIs. Methods include use of Java Native Interface call, encoding a temporary file name in a job name, unique identification string in a job name, unique file names supporting simultaneous, multiple jobs, and modularization by a user interface package and a communication interface package.
    Type: Application
    Filed: December 17, 2004
    Publication date: June 22, 2006
    Inventor: Prasad Nagaraja