Patents by Inventor Prasad Rao Kotra

Prasad Rao Kotra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • FLEXIBLE AND OPTIMIZED POWER MANAGEMENT UNIT (PMU) FOR MULTIPLE POWER SUPPLY SCENARIOS
    Publication number: 20240111356
    Abstract: Apparatuses and methods of operating a flexible and optimized power management unit (PMU) for multiple power supply scenarios are described. One integrated circuit includes a first terminal to couple to an unregulated power supply, a second terminal to couple to a regulated power supply, a first regulator, and a second regulator. The first regulator outputs a first supply voltage in a first configuration, and the second regulator outputs a second supply voltage in a second configuration. The first and second regulators do not operate concurrently.
    Type: Application
    Filed: October 11, 2023
    Publication date: April 4, 2024
    Inventors: Radhika Venkatasubramanian, Stephen W. Dow, Prasad Rao Kotra, Victor Simileysky, Ataur Rehman Khan, David Moeller, Brian Ballweber
  • Flexible and optimized power management unit (PMU) for multiple power supply scenarios
    Patent number: 11815981
    Abstract: Apparatuses and methods of operating a flexible and optimized power management unit (PMU) for multiple power supply scenarios are described. One integrated circuit includes a first terminal to couple to an unregulated power supply, a second terminal to couple to a regulated power supply, a first regulator, and a second regulator. The first regulator outputs a first supply voltage in a first configuration, and the second regulator outputs a second supply voltage in a second configuration. The first and second regulators do not operate concurrently.
    Type: Grant
    Filed: March 8, 2022
    Date of Patent: November 14, 2023
    Assignee: Cypress Semiconductor Corporation
    Inventors: Radhika Venkatasubramanian, Stephen W. Dow, Prasad Rao Kotra, Victor Simileysky, Ataur Rehman Khan, David Moeller, Brian Ballweber
  • LOW OUTPUT-TO-OUTPUT SKEW/LOW JITTER STAGGERED OUTPUT BUFFER
    Publication number: 20070247195
    Abstract: A system and method for generating multiple current steered output signals at a centralized location and subsequently routing them to their respective output pads is shown and described. The system and method allow designers to variously stagger output pad configurations while maintaining low output-to-output skew and low jitter.
    Type: Application
    Filed: March 22, 2007
    Publication date: October 25, 2007
    Applicant: Cypress Semiconductor Corporation
    Inventors: Prasad Rao Kotra, Sanjeev Dua
  • Clock circuit with self correcting duty cycle
    Patent number: 6518809
    Abstract: An apparatus including a driver and an adjustment circuit. The driver circuit may be configured to generate an output signal in response to a clock input signal and an adjustment signal. The adjustment circuit may be configured to generate the adjustment signal in response to the output signal. The adjustment signal may be configured to correct a duty cycle of the output signal.
    Type: Grant
    Filed: August 1, 2001
    Date of Patent: February 11, 2003
    Assignee: Cypress Semiconductor Corp.
    Inventor: Prasad Rao Kotra