Patents by Inventor Prasad SHIVARAM

Prasad SHIVARAM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8832626
    Abstract: Methods for allocating spare latch circuits to logic blocks in an integrated circuit design are provided. A method includes determining logic blocks in the design and determining and determining an allocation of spare latch circuits among the logic blocks based on respective attributes of the logic blocks. The method further include placing the spare latch circuits in the design in accordance with the determined allocation based on local clock buffers corresponding with the logic blocks.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: September 9, 2014
    Assignee: International Business Machines Corporation
    Inventors: Mitesh A. Agrawal, Santosh Balasubramanian, Pradeep N. Chatnahalli, Prasad Shivaram
  • Patent number: 8490039
    Abstract: Methods for allocating spare latch circuits to logic blocks in an integrated circuit design are provided. A method includes determining logic blocks in the design and determining and determining an allocation of spare latch circuits among the logic blocks based on respective attributes of the logic blocks. The method further include placing the spare latch circuits in the design in accordance with the determined allocation based on local clock buffers corresponding with the logic blocks.
    Type: Grant
    Filed: December 9, 2011
    Date of Patent: July 16, 2013
    Assignee: International Business Machines Corporation
    Inventors: Mitesh A. Agrawal, Santosh Balasubramanian, Pradeep N. Chatnahalli, Prasad Shivaram
  • Publication number: 20130152029
    Abstract: Methods for allocating spare latch circuits to logic blocks in an integrated circuit design are provided. A method includes determining logic blocks in the design and determining and determining an allocation of spare latch circuits among the logic blocks based on respective attributes of the logic blocks. The method further include placing the spare latch circuits in the design in accordance with the determined allocation based on local clock buffers corresponding with the logic blocks.
    Type: Application
    Filed: December 9, 2011
    Publication date: June 13, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mitesh A. AGRAWAL, Santosh BALASUBRAMANIAN, Pradeep N. CHATNAHALLI, Prasad SHIVARAM