Abstract: Techniques for forming gate dielectric layers (702) overlying amorphous substrate materials are presented. In addition, techniques for low temperature processing operations that allow for the use of amorphous silicon in doping operations are presented. The amorphous silicon regions (604, 606) are formed prior to formation of structures included in the gate structure (804) of the semiconductor device, where the gate structures (804) are preferably formed using low temperature operations that allow the amorphous silicon regions (604, 606) to remain in an amorphous state. Source/drain regions (1004, 1006) are formed in the amorphous silicon regions (604, 606), and then the substrate is annealed to recrystallize the amorphous regions.

Abstract: In accordance with a specific embodiment of the present invention, a method of forming a gate dielectric is disclosed. A semiconductor wafer is placed in a deposition chamber. The semiconductor wafer is heated and a precursor gas is flowed into the chamber. In one embodiment, the precursor comprises a moiety of silicon, oxygen, and a transition metal. In another embodiment, the moiety includes a group 2 metal.

Abstract: A silicon-on-insulator substrate and its method of formation are disclosed. In another embodiment, a method for forming a high-k gate dielectric is disclosed. The silicon-on-insulator substrate is prepared by forming a lattice matched dielectric layer (20) over a semiconductor substrate (10). A thermodynamically stable dielectric layer (22) is then formed over the lattice matched dielectric layer (20). A semiconductor layer (30) is then formed over the thermodynamically stable dielectric layer (22). Formation of the high-k gate dielectric includes the processing steps used to form the silicon-on-insulator substrate and additionally includes bonding a second semiconductor substrate (50) to the semiconductor layer (30). The first semiconductor substrate (10) is then removed to expose the lattice matched dielectric layer (20). This results in a silicon substrate that has a layer of high-k dielectric material that can be used as the gate dielectric for integrated circuits formed on the substrate.

Abstract: A metal-organic precursor suitable for use in a chemical vapor deposition formation of dielectric layer is disclosed. The precursor comprises a moiety that includes a first metal atom, an oxygen atom, and a nitrogen atom. The oxygen atom is chemically bonded to the metal atom and to the nitrogen atom. The first metal atom may be a Group III, Group IV, or Group V transition metals such as yttrium, lanthanum, titanium, zirconium, hafnium, niobium, and tantalum or another metal such as aluminum. The precursor may include one or more alkoxy groups bonded to the first metal atom. The precursor may be characterized as a M(OCR3)X−Y−Z(ONR2)Y(OSiR3)Z molecule where Y is an integer from 1 to (X−1), Z is an integer from 0 to X−1, X is an integer from 3 to 5 depending upon the valency of M and (Y+Z) is less than or equal to X. In one embodiment the precursor further includes one or more siloxy or alkyl siloxy groups bonded to the first metal atom.

Abstract: A process for forming a capacitor with a high-k dielectric or ferroelectric layer within a semiconductor device is used to reduce the likelihood of oxidation or materials interactions between that layer and an underlying layer. A first electrode layer includes atoms that form along grain boundaries within the first electrode layer to reduce the oxidation of a conductive plug or undesired materials interactions.

Abstract: Techniques for forming gate dielectric layers (702) overlying amorphous substrate materials are presented. In addition, techniques for low temperature processing operations that allow for the use of amorphous silicon in doping operations are presented. The amorphous silicon regions (604, 606) are formed prior to formation of structures included in the gate structure (804) of the semiconductor device, where the gate structures (804) are preferably formed using low temperature operations that allow the amorphous silicon regions (604, 606) to remain in an amorphous state. Source/drain regions (1004, 1006) are formed in the amorphous silicon regions (604, 606), and then the substrate is annealed to recrystallize the amorphous regions.