Patents by Inventor Prasanna Singamsetty

Prasanna Singamsetty has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10217472
    Abstract: A system and method for data transmission over an audio jack are disclosed. A particular embodiment includes: an audio interface including an audio jack, the audio interface including a right audio signal interface and a left audio signal interface; a data extractor coupled to the audio interface, the data extractor being configured to receive an audio stream via the audio interface and to isolate data encoded into the audio stream as out-of-phase data tones; and a microcontroller coupled to the data extractor to receive and process the data isolated by the data extractor.
    Type: Grant
    Filed: December 28, 2013
    Date of Patent: February 26, 2019
    Assignee: Intel Corporation
    Inventors: Indira Negi, Haibin Liu, Lakshman Krishnamurthy, Alexander Essaian, Brian K. Vogel, Xiaochao Yang, Prasanna Singamsetty, Fuad Al-Amin
  • Patent number: 10078780
    Abstract: A method is described including storing reference vector data corresponding to user gestures at a plurality of neurons at pattern matching hardware, receiving real time signals from the sensor array and performing gesture recognition using the pattern matching hardware to compare incoming vector data corresponding to the real time signals with the reference vector data.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: September 18, 2018
    Assignee: INTEL CORPORATION
    Inventors: Xue Yang, Sridhar G. Sharma, Prasanna Singamsetty, Lakshman Krishnamurthy, Ke Ding
  • Publication number: 20160379659
    Abstract: A system and method for data transmission over an audio jack are disclosed. A particular embodiment includes: an audio interface including an audio jack, the audio interface including a right audio signal interface and a left audio signal interface; a data extractor coupled to the audio interface, the data extractor being configured to receive an audio stream via the audio interface and to isolate data encoded into the audio stream as out-of-phase data tones; and a microcontroller coupled to the data extractor to receive and process the data isolated by the data extractor.
    Type: Application
    Filed: December 28, 2013
    Publication date: December 29, 2016
    Applicant: lntel Corporation
    Inventors: Indira Negi, Haibin Liu, Lakshman Krishnamurthy, Alexander Essaian, Brian K. Vogel, Xiaochao Yang, Prasanna Singamsetty, Fuad Al-Amin
  • Publication number: 20160283783
    Abstract: A method is described including storing reference vector data corresponding to user gestures at a plurality of neurons at pattern matching hardware, receiving real time signals from the sensor array and performing gesture recognition using the pattern matching hardware to compare incoming vector data corresponding to the real time signals with the reference vector data.
    Type: Application
    Filed: March 27, 2015
    Publication date: September 29, 2016
    Applicant: Intel Corporation
    Inventors: Xue Yang, Sridhar G. Sharma, Prasanna Singamsetty, Lakshman Krishnamurthy, Ke Ding
  • Patent number: 8787465
    Abstract: An embodiment improves the operation of a H.264 and Joint Scalable Video Codec (e.g., JSVC/H.264 Amendment 3) video decoder by managing neighboring block data during the decoding process. An embodiment pre-computes neighboring block tables to efficiently locate the neighboring block data required to decode a current macroblock. In particular, the pre-computed most probable joint neighboring block tables disclosed herein handle both macroblock adaptive frame field (MBAFF) coding and non-MBAFF coding. An embodiment is further capable of managing variable block sizes. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: July 22, 2014
    Assignee: Intel Corporation
    Inventors: Yi-Jen Chiu, Prasanna Singamsetty, Munsi Haque
  • Patent number: 8243798
    Abstract: In some embodiments, a method includes generating a first image data frame, a first error image data frame and a second error image data frame based at least in part on a bitstream. The method further includes upscaling or de-quantizing the first image data frame to provide a first predicted image data frame, generating a second image data frame based at least in part on the first predicted image data frame and the first error image data frame, upscaling or de-quantizing the second image data frame to provide a second predicted image data frame, and generating a third image data frame based at least in part on the second predicted image data frame and the second error image data frame. In some embodiments, an apparatus includes a storage medium having stored instructions that when executed by a machine result in the method.
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: August 14, 2012
    Assignee: Intel Corporation
    Inventors: Munsi A. Haque, Prasanna Singamsetty
  • Patent number: 7965767
    Abstract: A first filtering module filters actual pixel values in a first direction (e.g., vertically), and a second filtering module filters interpolated pixel values received from the first filtering module in a second direction (e.g., horizontally). Also, a third filtering module filters actual pixels in the second direction. A computation module is coupled to the first, second and, third filtering modules. The computation module generates quarter-sample interpolated pixel values. These values are based on combinations of pixel values selected from actual pixel values and interpolated pixel values received from the first, second and, third filtering modules.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: June 21, 2011
    Assignee: Intel Corporation
    Inventors: Musa Jahanghir, Prasanna Singamsetty
  • Publication number: 20080285642
    Abstract: A first filtering module filters actual pixel values in a first direction (e.g., vertically), and a second filtering module filters interpolated pixel values received from the first filtering module in a second direction (e.g., horizontally). Also, a third filtering module filters actual pixels in the second direction. A computation module is coupled to the first, second and, third filtering modules. The computation module generates quarter-sample interpolated pixel values. These values are based on combinations of pixel values selected from actual pixel values and interpolated pixel values received from the first, second and, third filtering modules.
    Type: Application
    Filed: June 30, 2006
    Publication date: November 20, 2008
    Inventors: Musa Jahanghir, Prasanna Singamsetty
  • Publication number: 20080152002
    Abstract: In some embodiments, a method includes generating a first image data frame, a first error image data frame and a second error image data frame based at least in part on a bitstream. The method further includes upscaling or de-quantizing the first image data frame to provide a first predicted image data frame, generating a second image data frame based at least in part on the first predicted image data frame and the first error image data frame, upscaling or de-quantizing the second image data frame to provide a second predicted image data frame, and generating a third image data frame based at least in part on the second predicted image data frame and the second error image data frame. In some embodiments, an apparatus includes a storage medium having stored instructions that when executed by a machine result in the method.
    Type: Application
    Filed: December 20, 2006
    Publication date: June 26, 2008
    Inventors: Munsi A. Haque, Prasanna Singamsetty
  • Publication number: 20070230582
    Abstract: An embodiment improves the operation of a H.264 and Joint Scalable Video Codec (e.g., JSVC/H.264 Amendment 3) video decoder by managing neighboring block data during the decoding process. An embodiment pre-computes neighboring block tables to efficiently locate the neighboring block data required to decode a current macroblock. In particular, the pre-computed most probable joint neighboring block tables disclosed herein handle both macroblock adaptive frame field (MBAFF) coding and non-MBAFF coding. An embodiment is further capable of managing variable block sizes. Other embodiments are described and claimed.
    Type: Application
    Filed: March 31, 2006
    Publication date: October 4, 2007
    Inventors: Yi-Jen Chiu, Prasanna Singamsetty, Munsi Haque
  • Patent number: 7262722
    Abstract: A binary arithmetic decoding apparatus includes first, second and third pairs of look-up tables and first, second and third multiplexers. The first multiplexer selects between the respective outputs of the two look-up tables of the first pair of look-up tables. The second multiplexer selects between the respective outputs of a first look-up table of the second pair of look-up tables and of a first look-up table of the third pair of look-up tables. The third multiplexer selects between the respective outputs of a second look-up table of the second pair of look-up tables and of a second look-up table of the third pair of look-up tables. The three multiplexers are controlled in common.
    Type: Grant
    Filed: June 26, 2006
    Date of Patent: August 28, 2007
    Assignee: Intel Corporation
    Inventors: Musa Jahanghir, Munsi A. Haque, Prasanna Singamsetty