Patents by Inventor Prasenjit Ray

Prasenjit Ray has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10943046
    Abstract: A semiconductor apparatus includes a first cell having a first interconnect structure and a second cell having a second interconnect structure. The semiconductor apparatus further includes a first plurality of conductive segments, wherein each conductive segment of the first plurality of conductive segments directly connects a first metal level of the first interconnect structure to a first metal level of the second interconnect structure. The semiconductor apparatus further includes a third cell having a third interconnect structure and a fourth cell having a fourth interconnect structure. The semiconductor apparatus further includes a second plurality of conductive segments, wherein each conductive segment of the second plurality of conductive segments directly connects a second metal level of the third interconnect structure to a second metal level of the fourth interconnect structure, and the second metal level is different from the first metal level.
    Type: Grant
    Filed: October 21, 2019
    Date of Patent: March 9, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Prasenjit Ray, Lee-Chung Lu, Meng-Kai Hsu, Wen-Hao Chen, Yuan-Te Hou
  • Publication number: 20200050733
    Abstract: A semiconductor apparatus includes a first cell having a first interconnect structure and a second cell having a second interconnect structure. The semiconductor apparatus further includes a first plurality of conductive segments, wherein each conductive segment of the first plurality of conductive segments directly connects a first metal level of the first interconnect structure to a first metal level of the second interconnect structure. The semiconductor apparatus further includes a third cell having a third interconnect structure and a fourth cell having a fourth interconnect structure. The semiconductor apparatus further includes a second plurality of conductive segments, wherein each conductive segment of the second plurality of conductive segments directly connects a second metal level of the third interconnect structure to a second metal level of the fourth interconnect structure, and the second metal level is different from the first metal level.
    Type: Application
    Filed: October 21, 2019
    Publication date: February 13, 2020
    Inventors: Prasenjit RAY, Lee-Chung LU, Meng-Kai HSU, Wen-Hao CHEN, Yuan-Te HOU
  • Patent number: 10452805
    Abstract: A method is applied to reconfigure a set of uncrowned standard cells in a layout of a semiconductor apparatus. Each uncrowned standard cell includes a standard first array. Each standard first array includes a first stacked arrangement of vias interspersed with first segments of corresponding M(i)˜M(N) metallization layers. The M(N) metallization layer includes second segments which connect corresponding first segments of the M(N) metallization layer in the first standard arrays. The method includes crowning each first standard array in the set with a corresponding second standard array, the latter including a second stacked arrangement of vias interspersed with corresponding first segments of corresponding M(N+1)˜M(N+Q) metallization layers. The crowning includes disposing vias in a VIA(N+1) layer so as to be substantially collinear (relative to a first direction), and not substantially collinear (relative to a substantially perpendicular second direction), with corresponding vias in the VIA(N) layer.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: October 22, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Prasenjit Ray, Lee-Chung Lu, Meng-Kai Hsu, Wen-Hao Chen, Yuan-Te Hou
  • Publication number: 20190108305
    Abstract: A method is applied to reconfigure a set of uncrowned standard cells in a layout of a semiconductor apparatus. Each uncrowned standard cell includes a standard first array. Each standard first array includes a first stacked arrangement of vias interspersed with first segments of corresponding M(i)˜M(N) metallization layers. The M(N) metallization layer includes second segments which connect corresponding first segments of the M(N) metallization layer in the first standard arrays. The method includes crowning each first standard array in the set with a corresponding second standard array, the latter including a second stacked arrangement of vias interspersed with corresponding first segments of corresponding M(N+1)˜M(N+Q) metallization layers. The crowning includes disposing vias in a VIA(N+1) layer so as to be substantially collinear (relative to a first direction), and not substantially collinear (relative to a substantially perpendicular second direction), with corresponding vias in the VIA(N) layer.
    Type: Application
    Filed: November 30, 2018
    Publication date: April 11, 2019
    Inventors: Prasenjit RAY, Lee-Chung LU, Meng-Kai HSU, Wen-Hao CHEN, Yuan-Te HOU
  • Patent number: 10169520
    Abstract: A method is applied to reconfigure a set of uncrowned standard cells in a layout of a semiconductor apparatus. Each uncrowned standard cell includes a standard first array. Each standard first array includes a first stacked arrangement of vias interspersed with first segments of corresponding M(i)˜M(N) metallization layers. The M(N) metallization layer includes second segments which connect corresponding first segments of the M(N) metallization layer in the first standard arrays. The method includes crowning each first standard array in the set with a corresponding second standard array. Each standard second array includes a second stacked arrangement of vias interspersed with corresponding first segments of corresponding M(N+1)˜M(N+Q) metallization layers. The method further includes: adding, to the M(N+Q) layer, second segments which connect corresponding first segments of the M(N+Q) metallization layer in the corresponding second standard arrays.
    Type: Grant
    Filed: March 28, 2017
    Date of Patent: January 1, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Prasenjit Ray, Lee-Chung Lu, Meng-Kai Hsu, Wen-Hao Chen, Yuan-Te Hou
  • Publication number: 20180004886
    Abstract: A method is applied to reconfigure a set of uncrowned standard cells in a layout of a semiconductor apparatus. Each uncrowned standard cell includes a standard first array. Each standard first array includes a first stacked arrangement of vias interspersed with first segments of corresponding M(i)˜M(N) metallization layers. The M(N) metallization layer includes second segments which connect corresponding first segments of the M(N) metallization layer in the first standard arrays. The method includes crowning each first standard array in the set with a corresponding second standard array. Each standard second array includes a second stacked arrangement of vias interspersed with corresponding first segments of corresponding M(N+1)˜M(N+Q) metallization layers. The method further includes: adding, to the M(N+Q) layer, second segments which connect corresponding first segments of the M(N+Q) metallization layer in the corresponding second standard arrays.
    Type: Application
    Filed: March 28, 2017
    Publication date: January 4, 2018
    Inventors: Prasenjit RAY, Lee-Chung LU, Meng-Kai HSU, Wen-Hao CHEN, Yuan-Te HOU
  • Patent number: 7347020
    Abstract: The Invention is a message board having a base, a frame and a hinge connecting the frame and base. The frame has an open position and a closed position and defines a frame opening. A planar member releasably retains an artwork within the frame such that the artwork is displayed through the frame opening when the frame is in the closed position. An erasable writing surface is defined by the planar member and is displayed when the frame is in the open position.
    Type: Grant
    Filed: July 8, 2005
    Date of Patent: March 25, 2008
    Inventors: Prasenjit Ray, Jason L. Swartley, George P. Angell, Todd E. Foreman, Cutis W. Krazer
  • Publication number: 20070006505
    Abstract: The Invention is a message board having a base, a frame and a hinge connecting the frame and base. The frame has an open position and a closed position and defines a frame opening. A planar member releasably retains an artwork within the frame such that the artwork is displayed through the frame opening when the frame is in the closed position. An erasable writing surface is defined by the planar member and is displayed when the frame is in the open position.
    Type: Application
    Filed: July 8, 2005
    Publication date: January 11, 2007
    Inventors: Prasenjit Ray, Jason Swartley, George Angell, Todd Forman, Curtis Krazer