Abstract: A memory controller includes a control circuit configured to provide a control signal, an output interface unit, and a command storage unit coupled to the control circuit and the output interface. The command storage unit is configured to store a plurality of commands, receive the control signal, and provide, in response to the control signal, a selected command of the plurality of commands to the output interface unit.

Abstract: A preferred embodiment comprising a data switch includes a first processor for routing data packets including a MAC address, using a MAC address table stored in a writable memory. The switch further includes a second processor for routing data packets including an IP address using an IP address look-up table stored in the writable memory. The writable memory consists of a single memory fabric that is allocated between the MAC address table and the look-up table by a memory control unit according to a setting stored in a non-erasable memory unit.

Abstract: A memory controller includes a control circuit configured to provide a control signal, an output interface unit, and a command storage unit coupled to the control circuit and the output interface. The command storage unit is configured to store a plurality of commands, receive the control signal, and provide, in response to the control signal, a selected command of the plurality of commands to the output interface unit.

Abstract: An integrated circuit (20) comprises a plurality of processing modules (3, 5, 7) which interact during the normal operation of the integrated circuit. Switches (13, 15) are provided on the integrated circuit (20) and operated during a testing procedure to isolate a single module (3) or a group of modules (5, 7) from the other modules, so that that the isolated module or group of modules can be tested. During the testing procedure, the switches (13, 15) provide defined signals at inputs of the isolated module(s) which, when the integrated circuit is in normal operation, are controlled by outputs of the other modules.

Abstract: A preferred embodiment comprising a data switch includes a first processor for routing data packets including a MAC address, using a MAC address table stored in a writable memory. The switch further includes a second processor for routing data packets including an IP address using an IP address look-up table stored in the writable memory. The writable memory consists of a single memory fabric that is allocated between the MAC address table and the look-up table by a memory control unit according to a setting stored in a non-erasable memory unit.

Abstract: Method of testing multiple modules on an integrated circuit An integrated circuit (20) comprises a plurality of processing modules (3, 5, 7) which interact during the normal operation of the integrated circuit. Switches (13, 15) are provided on the integrated circuit (20) and operated during a testing procedure to isolate a single module (3) or a group of modules (5, 7) from the other modules, so that that the isolated module or group of modules can be tested. During the testing procedure, the switches (13, 15) provide defined signals at inputs of the isolated module(s) which, when the integrated circuit is in normal operation, are controlled by outputs of the other modules.