Abstract: This disclosure provides systems, methods, and devices for image signal processing that support compression of image data from image sensors with different color filter array (CFA) configurations. In a first aspect, a method of image processing includes receiving, by a processor, first image data from a first image sensor having a first color filter configuration, the first image data comprising a plurality of values organized according to the first color filter; determining, by the processor, second image data by re-arranging the plurality of values of the first image data; determining, by the processor, third image data by compressing the second image data; and storing, by the processor, the third image data into memory. Other aspects and features are also claimed and described.

Abstract: In a computing device having a pipeline of image processing components, DCVS bandwidth voting may be based on a feedforward compression ratio determined by the first image processing component in the pipeline. The DCVS bandwidth voting may be based on the result of a comparison of change in the feedforward compression ratio with a threshold. Transaction initiator components in the pipeline may select their votes for bandwidth from among a feedforward compression ratio-based value and one or more other values, based on the result of the comparison with the threshold. DCVS parameters may be selected based on bandwidth votes received from transaction initiator components.

Abstract: Information communication circuitry, including a first integrated circuit for coupling to a second integrated circuit in a package on package configuration. The first integrated circuit comprises processing circuitry for communicating information bits, and the information bits comprise data bits and error correction bits, where the error correction bits are for indicating whether data bits are received correctly. The second integrated circuit comprises a memory for receiving and storing at least some of the information bits. The information communication circuitry also includes interfacing circuitry for selectively communicating, along a number of conductors, between the package on package configuration. In a first instance, the interfacing circuitry selectively communicates only data bits along the number of conductors.

Abstract: Information communication circuitry, including a first integrated circuit for coupling to a second integrated circuit in a package on package configuration. The first integrated circuit comprises processing circuitry for communicating information bits, and the information bits comprise data bits and error correction bits, where the error correction bits are for indicating whether data bits are received correctly. The second integrated circuit comprises a memory for receiving and storing at least some of the information bits. The information communication circuitry also includes interfacing circuitry for selectively communicating, along a number of conductors, between the package on package configuration. In a first instance, the interfacing circuitry selectively communicates only data bits along the number of conductors.

Abstract: Embodiments include methods for image compression and decompression. A sending computing device may determine a type of packing used for a chunk of image data, generate metadata describing the type of packing used for the chunk of image data, pack the chunk of image data according to the determined type of packing, and send the packed chunk of image data and the metadata to a second computing device. A receiving computing device may decode the metadata describing the type of packing used for the chunk of image data, determine the type of packing used for the chunk of image data based on the decoded metadata, and unpack the chunk of image data according to the determined type of packing used for the chunk of image data.

Abstract: Embodiments include methods for image compression and decompression. A sending computing device may determine a type of packing used for a chunk of image data, generate metadata describing the type of packing used for the chunk of image data, pack the chunk of image data according to the determined type of packing, and send the packed chunk of image data and the metadata to a second computing device. A receiving computing device may decode the metadata describing the type of packing used for the chunk of image data, determine the type of packing used for the chunk of image data based on the decoded metadata, and unpack the chunk of image data according to the determined type of packing used for the chunk of image data.

Abstract: Information communication circuitry, including a first integrated circuit for coupling to a second integrated circuit in a package on package configuration. The first integrated circuit comprises processing circuitry for communicating information bits, and the information bits comprise data bits and error correction bits, where the error correction bits are for indicating whether data bits are received correctly. The second integrated circuit comprises a memory for receiving and storing at least some of the information bits. The information communication circuitry also includes interfacing circuitry for selectively communicating, along a number of conductors, between the package on package configuration. In a first instance, the interfacing circuitry selectively communicates only data bits along the number of conductors.

Abstract: Information communication circuitry, including a first integrated circuit for coupling to a second integrated circuit in a package on package configuration. The first integrated circuit comprises processing circuitry for communicating information bits, and the information bits comprise data bits and error correction bits, where the error correction bits are for indicating whether data bits are received correctly. The second integrated circuit comprises a memory for receiving and storing at least some of the information bits. The information communication circuitry also includes interfacing circuitry for selectively communicating, along a number of conductors, between the package on package configuration. In a first instance, the interfacing circuitry selectively communicates only data bits along the number of conductors.

Abstract: Information communication circuitry, including a first integrated circuit for coupling to a second integrated circuit in a package on package configuration. The first integrated circuit comprises processing circuitry for communicating information bits, and the information bits comprise data bits and error correction bits, where the error correction bits are for indicating whether data bits are received correctly. The second integrated circuit comprises a memory for receiving and storing at least some of the information bits. The information communication circuitry also includes interfacing circuitry for selectively communicating, along a number of conductors, between the package on package configuration. In a first instance, the interfacing circuitry selectively communicates only data bits along the number of conductors.

Abstract: Information communication circuitry, including a first integrated circuit for coupling to a second integrated circuit in a package on package configuration. The first integrated circuit comprises processing circuitry for communicating information bits, and the information bits comprise data bits and error correction bits, where the error correction bits are for indicating whether data bits are received correctly. The second integrated circuit comprises a memory for receiving and storing at least some of the information bits. The information communication circuitry also includes interfacing circuitry for selectively communicating, along a number of conductors, between the package on package configuration. In a first instance, the interfacing circuitry selectively communicates only data bits along the number of conductors.

Abstract: A method for testing an imaging subsystem of a system-on-a-chip (SOC) is provided that includes executing imaging subsystem test software instructions periodically on a processor of the SOC, receiving reference image data in the imaging subsystem responsive to the executing of the test software instructions, performing image signal processing on the reference image data by the imaging subsystem to generate processed reference image data, and using the processed reference image data by the test software instructions to verify whether or not the imaging subsystem is operating correctly.

Abstract: A system includes first and second processing components, a qualified based splitter component, a first and second configurable cache element and an arbiter component. The first data processing component generates a first request for a first portion of data at a first location within a memory. The second data processing component generates a second request for a second portion of data at a second location within the memory. The qualifier based splitter component routes the first request and the second request based on a qualifier. The first configurable cache element enables or disables prefetching data within a first region of the memory. The second configurable cache element enables or disables prefetching data within a second region of the memory. The arbiter component routes the first request and the second request to the memory.

Abstract: A system includes first and second processing components, a qualified based splitter component, a first and second configurable cache element and an arbiter component. The first data processing component generates a first request for a first portion of data at a first location within a memory. The second data processing component generates a second request for a second portion of data at a second location within the memory. The qualifier based splitter component routes the first request and the second request based on a qualifier. The first configurable cache element enables or disables prefetching data within a first region of the memory. The second configurable cache element enables or disables prefetching data within a second region of the memory. The arbiter component routes the first request and the second request to the memory.

Abstract: A method for testing an imaging subsystem of a system-on-a-chip (SOC) is provided that includes executing imaging subsystem test software instructions periodically on a processor of the SOC, receiving reference image data in the imaging subsystem responsive to the executing of the test software instructions, performing image signal processing on the reference image data by the imaging subsystem to generate processed reference image data, and using the processed reference image data by the test software instructions to verify whether or not the imaging subsystem is operating correctly.

Abstract: Information communication circuitry, including a first integrated circuit for coupling to a second integrated circuit in a package on package configuration. The first integrated circuit comprises processing circuitry for communicating information bits, and the information bits comprise data bits and error correction bits, where the error correction bits are for indicating whether data bits are received correctly. The second integrated circuit comprises a memory for receiving and storing at least some of the information bits. The information communication circuitry also includes interfacing circuitry for selectively communicating, along a number of conductors, between the package on package configuration. In a first instance, the interfacing circuitry selectively communicates only data bits along the number of conductors.