Patents by Inventor Prashant Gadgil

Prashant Gadgil has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6241845
    Abstract: A plasma processing chamber includes a substrate holder and a gas distribution plate having an inner surface facing the substrate holder, the inner surface being maintained below a threshold temperature to minimize process drift during processing of substrates. The inner surface is cooled by adding a heat transfer gas such as helium to process gas supplied through the gas distribution plate. The chamber can include a dielectric window between an antenna and the gas distribution plate. The control of the temperature of the inner surface facing the substrate minimizes process drift and degradation of the quality of the processed substrates during sequential processing of the substrates such as during oxide etching of semiconductor wafers.
    Type: Grant
    Filed: October 21, 1999
    Date of Patent: June 5, 2001
    Assignee: Lam Research Corporation
    Inventors: Prashant Gadgil, Janet M. Flanner, John P. Jordan, Adrian Doe, Robert Chebi
  • Patent number: 6048798
    Abstract: A plasma processing chamber includes a substrate holder and a gas distribution plate having an inner surface facing the substrate holder, the inner surface being maintained below a threshold temperature to minimize process drift during processing of substrates. The inner surface is cooled by adding a heat transfer gas such as helium to process gas supplied through the gas distribution plate. The chamber can include a dielectric window between an antenna and the gas distribution plate. The control of the temperature of the inner surface facing the substrate minimizes process drift and degradation of the quality of the processed substrates during sequential processing of the substrates such as during oxide etching of semiconductor wafers.
    Type: Grant
    Filed: June 5, 1996
    Date of Patent: April 11, 2000
    Assignee: Lam Research Corporation
    Inventors: Prashant Gadgil, Janet M. Flanner, John P. Jordon, Adrian Doe, Robert Chebi
  • Patent number: 5783496
    Abstract: A method in a plasma processing chamber for fabricating a semiconductor device having a self-aligned contact. The method includes the step of providing a wafer having a substrate, a polysilicon layer disposed above the substrate, a nitride layer disposed above a polysilicon layer, and an oxide layer disposed above the nitride layer. The method further includes the step of etching in a first etching step partially through the oxide layer of the layer stack with a first chemistry and a first set of process parameters. In this first etching step, the first chemistry comprises essentially of CHF.sub.3 and C.sub.2 HF.sub.5. The method also includes the step of etching the oxide layer in a second etching step through to the substrate with a second chemistry comprising CHF.sub.3 and C.sub.2 HF.sub.5 and a second set of process parameters.
    Type: Grant
    Filed: March 29, 1996
    Date of Patent: July 21, 1998
    Assignee: Lam Research Corporation
    Inventors: Janet M. Flanner, Prashant Gadgil, Linda N. Marquez, Adrian Doe, Joel M. Cook