Patents by Inventor Prashant J. NAIR

Prashant J. NAIR has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Microarchitectural techniques to mitigate cache-based data security vulnerabilities
    Patent number: 11068612
    Abstract: Embodiments for mitigating cache-based data security vulnerabilities in a computing environment are provided. Cache pollution due to speculative memory accesses within a speculative path is avoided by delaying data updates to a cache and memory subsystem until the speculative memory accesses are resolved. A speculative buffer is used to maintain the speculative memory accesses such that a state of the cache remains unchanged until the speculative memory accesses are committed.
    Type: Grant
    Filed: August 1, 2018
    Date of Patent: July 20, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Prashant J. Nair, Seokin Hong, Alper Buyuktosunoglu, Ravi Nair
  • MICROARCHITECTURAL TECHNIQUES TO MITIGATE CACHE-BASED DATA SECURITY VULNERABILITIES
    Publication number: 20200042732
    Abstract: Embodiments for mitigating cache-based data security vulnerabilities in a computing environment are provided. Cache pollution due to speculative memory accesses within a speculative path is avoided by delaying data updates to a cache and memory subsystem until the speculative memory accesses are resolved. A speculative buffer is used to maintain the speculative memory accesses such that a state of the cache remains unchanged until the speculative memory accesses are committed.
    Type: Application
    Filed: August 1, 2018
    Publication date: February 6, 2020
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Prashant J. NAIR, Seokin HONG, Alper BUYUKTOSUNOGLU, Ravi NAIR