Patents by Inventor Prashant Jain
Prashant Jain has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190301886Abstract: Embodiments of the present disclosure are directed to providing an Augmented Reality (AR) navigation display in a vehicle. More specifically, embodiments are directed to rendering AR indications of a navigation route over a camera video stream in perspective. According to one embodiment, visual tracking can be performed on features in the video data and camera pose, i.e., a matrix encapsulating position and orientation, can be determined for each frame of video based on both the visual tracking and navigation sensor data. These separately determined camera poses can then be merged or fused into a single camera pose that is more accurate and more stable and which can then be used in rendering more realistic AR route indicators onto the video of the real-world route captured by the camera.Type: ApplicationFiled: March 29, 2018Publication date: October 3, 2019Inventors: Vidya Elangovan, Prashant Jain, Anthony Tao Liang, Guan Wang
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Publication number: 20190019335Abstract: Embodiments of the present disclosure are directed to an augmented reality based user's manual for a vehicle implemented as an application on a mobile device which allows the user to point a mobile phone, tablet or an augmented reality headset at any part of the vehicle interior or exterior and experience augmented annotations, overlays, popups, etc. displayed on images of real parts of the car captured by the user's mobile device. Embodiments provide for estimating the camera pose in six degrees of freedom based on the content of the captured image or video and using a neural network trained on a dense sampling of a three-dimensional model of the car rendered with realistic textures to identify and properly align the augmented reality presentation with the image of the vehicle being captured by the mobile device.Type: ApplicationFiled: July 12, 2017Publication date: January 17, 2019Inventors: Vidya Elangovan, Prashant Jain, Anthony Tao Liang, Guan Wang
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Patent number: 10157137Abstract: Techniques are disclosed relating to set-associative caches in processors. In one embodiment, an integrated circuit is disclosed that includes a set-associative cache configured to receive a request for a data block stored in one of a plurality of ways within the cache, the request specifying an address, a portion of which is a tag value. In such an embodiment, the integrated circuit includes a way prediction circuit configured to predict, based on the tag value, a way in which the requested data block is stored. The integrated circuit further includes a tag array circuit configured to perform a comparison of a portion of the tag value with a set of previously stored tag portions corresponding to the plurality of ways. The tag array circuit is further configured to determine whether the request hits in the cache based on the predicted way and an output of the comparison.Type: GrantFiled: September 22, 2015Date of Patent: December 18, 2018Assignee: Apple Inc.Inventors: Prashant Jain, Jason M. Kassoff, Sandeep Gupta
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Patent number: 10127153Abstract: Techniques are disclosed relating to managing data-request dependencies for a cache. In one embodiment, an integrated circuit is disclosed that includes a plurality of requesting agents and a cache. The cache is configured to receive read and write requests from the plurality of requesting agents including a first request and a second request. The cache is configured to detect that the first and second requests specify addresses that correspond to different portions of the same cache line, and to determine whether to delay processing one of the first and second requests based on whether the first and second requests are from the same requesting agent. In some embodiments, the cache is configured to service the first and second requests in parallel in response to determining that the first and second requests are from the same requesting agent.Type: GrantFiled: September 28, 2015Date of Patent: November 13, 2018Assignee: Apple Inc.Inventors: James Vash, Prashant Jain, Sandeep Gupta
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Publication number: 20180276128Abstract: In an embodiment, an apparatus includes multiple memory resources, and a resource table that includes entries that correspond to respective memory resources of the multiple memory resources. The apparatus also includes a circuit configured to receive a first memory command. The first memory command is associated with a subset of the multiple memory resources. For each memory resource of the subset, the circuit is also configured to set a respective indicator associated with the first memory command, and to store a first value in a first entry of the resource table in response to a determination that the respective memory resource is unavailable. The circuit is also configured to store a second value in each entry of the resource table that corresponds to a memory resource of the subset in response to a determination that an entry corresponding to a given memory resource of the subset includes the first value.Type: ApplicationFiled: June 4, 2018Publication date: September 27, 2018Inventors: Bikram Saha, Harshavardhan Kaushikkar, Sukalpa Biswas, Prashant Jain
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Patent number: 9990294Abstract: In an embodiment, an apparatus includes multiple memory resources, and a resource table that includes entries that correspond to respective memory resources of the multiple memory resources. The apparatus also includes a circuit configured to receive a first memory command. The first memory command is associated with a subset of the multiple memory resources. For each memory resource of the subset, the circuit is also configured to set a respective indicator associated with the first memory command, and to store a first value in a first entry of the resource table in response to a determination that the respective memory resource is unavailable. The circuit is also configured to store a second value in each entry of the resource table that corresponds to a memory resource of the subset in response to a determination that an entry corresponding to a given memory resource of the subset includes the first value.Type: GrantFiled: February 24, 2016Date of Patent: June 5, 2018Assignee: Apple Inc.Inventors: Bikram Saha, Harshavardhan Kaushikkar, Sukalpa Biswas, Prashant Jain
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Patent number: 9954575Abstract: The present invention is directed to the selective provision of interference canceled signal streams to demodulating fingers in a communication receiver. According to the present invention, potential interferer signal paths are identified. Signal streams having one or more potential interferer signals removed or canceled are created, and a correlation is performed to determine whether the strength of a desired signal path increased as a result. If the correlation indicates that the strength of a desired signal path was increased by the signal cancellation, the interference canceled signal stream is provided to the demodulation finger assigned to track the desired signal path. If the correlation determines that the strength of the desired signal path did not increase as a result of performing interference cancellation, the raw or a different interference canceled signal stream is provided to the demodulation finger.Type: GrantFiled: March 8, 2016Date of Patent: April 24, 2018Assignee: III HOLDINGS 1, L.L.C.Inventors: Anand P. Narayan, Eric S. Olson, Prashant Jain
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Publication number: 20170242798Abstract: In an embodiment, an apparatus includes multiple memory resources, and a resource table that includes entries that correspond to respective memory resources of the multiple memory resources. The apparatus also includes a circuit configured to receive a first memory command. The first memory command is associated with a subset of the multiple memory resources. For each memory resource of the subset, the circuit is also configured to set a respective indicator associated with the first memory command, and to store a first value in a first entry of the resource table in response to a determination that the respective memory resource is unavailable. The circuit is also configured to store a second value in each entry of the resource table that corresponds to a memory resource of the subset in response to a determination that an entry corresponding to a given memory resource of the subset includes the first value.Type: ApplicationFiled: February 24, 2016Publication date: August 24, 2017Inventors: Bikram Saha, Harshavardhan Kaushikkar, Sukalpa Biswas, Prashant Jain
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Patent number: 9561488Abstract: A zinc titanate reactive adsorbent comprising multiphase, polycrystalline nanofibers comprising ZnTiO3, ZnO, TiO2, and Zn2TiO4.Type: GrantFiled: December 18, 2015Date of Patent: February 7, 2017Assignee: The Board of Trustees of The University of IllinoisInventors: Prashant Jain, Mayank Behl, Mark Shannon, Junghoon Yeom
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Patent number: 9563575Abstract: A mechanism for evicting a cache line from a cache memory includes first selecting for eviction a least recently used cache line of a group of invalid cache lines. If all cache lines are valid, selecting for eviction a least recently used cache line of a group of cache lines in which no cache line of the group of cache lines is also stored within a higher level cache memory such as the L1 cache, for example. Lastly, if all cache lines are valid and there are no non-inclusive cache lines, selecting for eviction the least recently used cache line stored in the cache memory.Type: GrantFiled: November 2, 2015Date of Patent: February 7, 2017Assignee: Apple Inc.Inventors: Brian P. Lilly, Gerard R. Williams, III, Mahnaz Sadoughi-Yarandi, Perumal R. Subramonium, Hari S. Kannan, Prashant Jain
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Patent number: 9513693Abstract: Systems and methods for reducing leakage power in a L2 cache within a SoC. The L2 cache is partitioned into multiple banks, and each bank has its own separate power supply. An idle counter is maintained for each bank to count a number of cycles during which the bank has been inactive. The temperature and leaky factor of the SoC are used to select an operating point of the SoC. Based on the operating point, an idle counter threshold is set, with a high temperature and high leaky factor corresponding to a relatively low idle counter threshold, and with a low temperature and low leaky factor corresponding to a relatively high idle counter threshold. When a given idle counter exceeds the idle counter threshold, the voltage supplied to the corresponding bank is reduced to a voltage sufficient for retention of data but not for access.Type: GrantFiled: March 25, 2014Date of Patent: December 6, 2016Assignee: Apple Inc.Inventors: Prashant Jain, Brian P. Lilly, Mahnaz Sadoughi-Yarandi, Helen Huang
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Patent number: 9454486Abstract: An apparatus for processing cache requests in a computing system is disclosed. The apparatus may include a pending request buffer and a control circuit. The pending request buffer may include a plurality of buffer entries. The control circuit may be coupled to the pending request buffer and may be configured to receive a request for a first cache line from a pre-fetch engine, and store the received request in an entry of the pending request buffer. The control circuit may be further configured to receive a request for a second cache line from a processor, and store the request received from the processor in the entry of the pending request buffer in response to a determination that the second cache line is the same as the first cache line.Type: GrantFiled: July 12, 2013Date of Patent: September 27, 2016Assignee: Apple Inc.Inventors: Brian P. Lilly, Perumal R Subramoniam, Prashant Jain
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Publication number: 20160191116Abstract: The present invention is directed to the selective provision of interference canceled signal streams to demodulating fingers in a communication receiver. According to the present invention, potential interferer signal paths are identified. Signal streams having one or more potential interferer signals removed or canceled are created, and a correlation is performed to determine whether the strength of a desired signal path increased as a result. If the correlation indicates that the strength of a desired signal path was increased by the signal cancellation, the interference canceled signal stream is provided to the demodulation finger assigned to track the desired signal path. If the correlation determines that the strength of the desired signal path did not increase as a result of performing interference cancellation, the raw or a different interference canceled signal stream is provided to the demodulation finger.Type: ApplicationFiled: March 8, 2016Publication date: June 30, 2016Inventors: Anand P. Narayan, Eric S. Olson, Prashant Jain
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Patent number: 9319152Abstract: The present invention is directed to the selective provision of interference canceled signal streams to demodulating fingers in a communication receiver. According to the present invention, potential interferer signal paths are identified. Signal streams having one or more potential interferer signals removed or canceled are created, and a correlation is performed to determine whether the strength of a desired signal path increased as a result. If the correlation indicates that the strength of a desired signal path was increased by the signal cancellation, the interference canceled signal stream is provided to the demodulation finger assigned to track the desired signal path. If the correlation determines that the strength of the desired signal path did not increase as a result of performing interference cancellation, the raw or a different interference canceled signal stream is provided to the demodulation finger.Type: GrantFiled: September 30, 2014Date of Patent: April 19, 2016Assignee: III Holdings 1, LLCInventors: Anand P. Narayan, Eric S. Olson, Prashant Jain
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Publication number: 20160101408Abstract: A zinc titanate reactive adsorbent comprising multiphase, polycrystalline nanofibers comprising ZnTiO3, ZnO, TiO2, and Zn2TiO4.Type: ApplicationFiled: December 18, 2015Publication date: April 14, 2016Inventors: Prashant Jain, Mayank Behl, Mark Shannon, Junghoon Yeom
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Publication number: 20160055099Abstract: A mechanism for evicting a cache line from a cache memory includes first selecting for eviction a least recently used cache line of a group of invalid cache lines. If all cache lines are valid, selecting for eviction a least recently used cache line of a group of cache lines in which no cache line of the group of cache lines is also stored within a higher level cache memory such as the L1 cache, for example. Lastly, if all cache lines are valid and there are no non-inclusive cache lines, selecting for eviction the least recently used cache line stored in the cache memory.Type: ApplicationFiled: November 2, 2015Publication date: February 25, 2016Inventors: Brian P. Lilly, Gerard R. Williams, III, Mahnaz Sadoughi-Yarandi, Perumal R. Subramonium, Hari S. Kannan, Prashant Jain
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Patent number: 9248428Abstract: A zinc titanate reactive adsorbent comprising multiphase, polycrystalline nanofibers comprising ZnTiO3, ZnO, TiO2, and Zn2TiO4.Type: GrantFiled: October 30, 2013Date of Patent: February 2, 2016Assignee: The Board of Trustees of the University of IllinoisInventors: Prashant Jain, Mayank Behl, Mark Shannon, Junghoon Yeom
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Patent number: 9176879Abstract: A mechanism for evicting a cache line from a cache memory includes first selecting for eviction a least recently used cache line of a group of invalid cache lines. If all cache lines are valid, selecting for eviction a least recently used cache line of a group of cache lines in which no cache line of the group of cache lines is also stored within a higher level cache memory such as the L1 cache, for example. Lastly, if all cache lines are valid and there are no non-inclusive cache lines, selecting for eviction the least recently used cache line stored in the cache memory.Type: GrantFiled: July 19, 2013Date of Patent: November 3, 2015Assignee: Apple Inc.Inventors: Brian P. Lilly, Gerard R. Williams, III, Mahnaz Sadoughi-Yarandi, Perumal R. Subramonium, Hari S. Kannan, Prashant Jain
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Publication number: 20150277541Abstract: Systems and methods for reducing leakage power in a L2 cache within a SoC. The L2 cache is partitioned into multiple banks, and each bank has its own separate power supply. An idle counter is maintained for each bank to count a number of cycles during which the bank has been inactive. The temperature and leaky factor of the SoC are used to select an operating point of the SoC. Based on the operating point, an idle counter threshold is set, with a high temperature and high leaky factor corresponding to a relatively low idle counter threshold, and with a low temperature and low leaky factor corresponding to a relatively high idle counter threshold. When a given idle counter exceeds the idle counter threshold, the voltage supplied to the corresponding bank is reduced to a voltage sufficient for retention of data but not for access.Type: ApplicationFiled: March 25, 2014Publication date: October 1, 2015Applicant: Apple Inc.Inventors: Prashant Jain, Brian P. Lilly, Mahnaz Sadoughi-Yarandi, Helen Huang
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Patent number: 9118400Abstract: An interference cancelling receiver combines data from multiple paths after aligning to transmitter timing, and uses either an equalizer or a Rake receiver to compute symbol estimates. Interference estimates are generated from the symbol estimates, and multiple interference estimates are combined after re-aligning the interference estimates to receiver timing. At least two segments of symbol estimates are computed for each segment of interference cancelled data. Various techniques may be employed for controlling the latency and sequencing of these operations, and the subsystems within the canceller may use different processing clock speeds.Type: GrantFiled: September 19, 2014Date of Patent: August 25, 2015Assignee: III HOLDINGS 1, LLCInventors: Anand P. Narayan, Greg Graham, David R. Meyer, Prashant Jain