Patents by Inventor Prashant Pathak

Prashant Pathak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11868769
    Abstract: Deployments of microservices executing in a cloud are automatically managed. Some microservices are deployed on dedicated nodes, others in serverless configurations. Rates of invocation and runtime data of microservices are monitored. Responsive to the monitored rate of invocation of a microservice running serverless exceeding a given threshold, the microservice is automatically redeployed to a dedicated node. A microservice executing on a dedicated node may be redeployed serverless if the infrequency with which it is called is sufficient. Microservices can be automatically redeployed between different dedicated nodes with different capacities based on monitored usage. The underlying cloud service provider may be automatically monitored for changes in serverless support functionality. Responsive to these changes, the thresholds at which microservices are redeployed can be automatically adjusted.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: January 9, 2024
    Assignee: PANGEA CYBER CORPORATION, INC.
    Inventors: Akshay Dongaonkar, Prashant Pathak, Sourabh Satish
  • Publication number: 20230064460
    Abstract: Various embodiments of the present invention provide methods, apparatus, systems, computing devices, computing entities, and/or the like for performing predictive data analysis. Certain embodiments of the present invention utilize systems, methods, and computer program products that perform predictive data analysis by generating input processing rules using at least one of general clusters generated using all of a set of prediction input data objects, high-confidence clusters generated using prediction input data objects having threshold-satisfying clustering confidence scores, and low-confidence clusters generated using prediction input data objects having non-threshold-satisfying clustering confidence scores.
    Type: Application
    Filed: December 21, 2021
    Publication date: March 2, 2023
    Inventors: Ryan M. Allen, Anmol, Prashant Pathak, Sebastian D. Perez
  • Patent number: 11576006
    Abstract: Devices, methods, and systems for infrastructure-less indoor navigation in a fire control system are described herein. One device includes a non-transitory computer readable medium having computer readable instructions stored thereon that are executable by a processor to receive a location of each of a plurality of smoke detectors of a facility, display the location of each of the plurality of smoke detectors in a building information model (BIM) on a user interface, wherein each respective one of the displayed plurality of smoke detectors represents a different smoke detector of the plurality of smoke detectors of the facility, receive a selection of a first displayed smoke detector of the plurality of displayed smoke detectors representing a first smoke detector of the plurality of smoke detectors of the facility, and guide a user to the location of the first smoke detector of the facility responsive to receiving the selection.
    Type: Grant
    Filed: August 13, 2020
    Date of Patent: February 7, 2023
    Assignee: Honeywell International Inc.
    Inventors: Vanathi Ravindran, Kamalraja Ganesan, Prashant Pathak
  • Patent number: 11495568
    Abstract: An IC package including an integrated circuit die having a major surface and one or more solder bumps located on the major surface in at least one corner region of the major surface and a substrate having a surface, the surface including bump pads thereon. The major surface of the integrated circuit die faces the substrate surface, the one or more solder bumps are bonded to individual ones of the bump pads to thereby form a bond joint, the major surface of the integrated circuit die has a footprint area of at least about 400 mm2. A ratio of a coefficient of thermal expansion of the substrate (CTEsub) to a coefficient of thermal expansion of the integrated circuit die (CTEdie) is at least about 3:1. A method of manufacturing an IC package is also disclosed.
    Type: Grant
    Filed: January 22, 2021
    Date of Patent: November 8, 2022
    Assignee: NVIDIA Corporation
    Inventors: Jayprakash Chipalkatti, Zuhair Bokharey, Don Templeton, Brian Schieck, Julie Lam, Prashant Pathak
  • Publication number: 20210151403
    Abstract: An IC package including an integrated circuit die having a major surface and one or more solder bumps located on the major surface in at least one corner region of the major surface and a substrate having a surface, the surface including bump pads thereon. The major surface of the integrated circuit die faces the substrate surface, the one or more solder bumps are bonded to individual ones of the bump pads to thereby form a bond joint, the major surface of the integrated circuit die has a footprint area of at least about 400 mm2. A ratio of a coefficient of thermal expansion of the substrate (CTEsub) to a coefficient of thermal expansion of the integrated circuit die (CTEdie) is at least about 3:1. A method of manufacturing an IC package is also disclosed.
    Type: Application
    Filed: January 22, 2021
    Publication date: May 20, 2021
    Inventors: Jayprakash Chipalkatti, Zuhair Bokharey, Don Templeton, Brian Schieck, Julie Lam, Prashant Pathak
  • Patent number: 10943882
    Abstract: An IC package including an integrated circuit die having a major surface and one or more solder bumps located on the major surface in at least one corner region of the major surface and a substrate having a surface, the surface including bump pads thereon. The major surface of the integrated circuit die faces the substrate surface, the one or more solder bumps are bonded to individual ones of the bump pads to thereby form a bond joint, the major surface of the integrated circuit die has a footprint area of at least about 400 mm2. A ratio of a coefficient of thermal expansion of the substrate (CTEsub) to a coefficient of thermal expansion of the integrated circuit die (CTEdie) is at least about 3:1. A method of manufacturing an IC package is also disclosed.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: March 9, 2021
    Assignee: Nvidia Corporation
    Inventors: Jayprakash Chipalkatti, Zuhair Bokharey, Don Templeton, Brian Schieck, Julie Lam, Prashant Pathak
  • Publication number: 20210066227
    Abstract: An IC package including an integrated circuit die having a major surface and one or more solder bumps located on the major surface in at least one corner region of the major surface and a substrate having a surface, the surface including bump pads thereon. The major surface of the integrated circuit die faces the substrate surface, the one or more solder bumps are bonded to individual ones of the bump pads to thereby form a bond joint, the major surface of the integrated circuit die has a footprint area of at least about 400 mm2. A ratio of a coefficient of thermal expansion of the substrate (CTEsub) to a coefficient of thermal expansion of the integrated circuit die (CTEdie) is at least about 3:1. A method of manufacturing an IC package is also disclosed.
    Type: Application
    Filed: August 28, 2019
    Publication date: March 4, 2021
    Inventors: Jayprakash Chipalkatti, Zuhair Bokharey, Don Templeton, Brian Schieck, Julie Lam, Prashant Pathak
  • Publication number: 20210054473
    Abstract: The present disclosure relates to designing of steel composition for line pipe steel to be used for sour environment. The developed steel of the present disclosure exhibits enhanced tensile properties in accordance with API 5L PSL-2 specification for X-65 grade steel, along with superior hydrogen induced cracking resistance with crack length ratio (CLR) of less than 10%, crack thickness ratio (CTR) of less than 5%, crack sensitivity ratio (CSR) of less than 2%. The developed steel is designed such that it is readily hot/cold formed and welded to form linepipe tubes to be used for the transportation of natural gas or crude oil, especially of sour grade. The present disclosure also provide a method of manufacturing the said steel having the composition of the present disclosure.
    Type: Application
    Filed: October 1, 2018
    Publication date: February 25, 2021
    Inventors: Prashant PATHAK, Saurabh KUNDU, Basudev BHATTACHARYA, Subrata MUKHERJEE, Amar Nath BHAGAT, Hrishikesh SHASTRI, Badirujjaman SYED
  • Patent number: 10876184
    Abstract: A process for making a hot rolled high strength steel (HRHSS) product including the steps of casting a steel slab having, in weight percent, C: 0.18-0.22, Mn: 1.0-2.0, Si: 0.8-1.2, Cr: 0.8-1.2, S: 0.008 max, P: 0.025 max, Al: 0.01-0.15, N: 0.005 max, Nb: 0.02-0.035, Mo: 0.08-0.12, the remainder iron (Fe) and incidental impurities, hot rolling the steel slab into strip at a finish rolling temperature (FRT) of 850-900° C., cooling the hot rolled strip at 40° C./s or more over a run out table (ROT) until the strip reaches 380-400° C., coiling the hot rolled strip, and then air cooling to room temperature.
    Type: Grant
    Filed: January 23, 2017
    Date of Patent: December 29, 2020
    Assignee: Tata Steel Limited
    Inventors: Appa Rao Chintha, Monideepa Mukherjee, Prashant Pathak, Tapas Chanda, Gyanaranjan Mishra
  • Publication number: 20200374657
    Abstract: Devices, methods, and systems for infrastructure-less indoor navigation in a fire control system are described herein. One device includes a non-transitory computer readable medium having computer readable instructions stored thereon that are executable by a processor to receive a location of each of a plurality of smoke detectors of a facility, display the location of each of the plurality of smoke detectors in a building information model (BIM) on a user interface, wherein each respective one of the displayed plurality of smoke detectors represents a different smoke detector of the plurality of smoke detectors of the facility, receive a selection of a first displayed smoke detector of the plurality of displayed smoke detectors representing a first smoke detector of the plurality of smoke detectors of the facility, and guide a user to the location of the first smoke detector of the facility responsive to receiving the selection.
    Type: Application
    Filed: August 13, 2020
    Publication date: November 26, 2020
    Inventors: Vanathi Ravindran, Kamalraja Ganesan, Prashant Pathak
  • Patent number: 10750321
    Abstract: Devices, methods, and systems for infrastructure-less indoor navigation in a fire control system are described herein. One device includes a non-transitory computer readable medium having computer readable instructions stored thereon that are executable by a processor to receive a location of each of a plurality of smoke detectors of a facility, display the location of each of the plurality of smoke detectors in a building information model (BIM) on a user interface, wherein each respective one of the displayed plurality of smoke detectors represents a different smoke detector of the plurality of smoke detectors of the facility, receive a selection of a first displayed smoke detector of the plurality of displayed smoke detectors representing a first smoke detector of the plurality of smoke detectors of the facility, and guide a user to the location of the first smoke detector of the facility responsive to receiving the selection.
    Type: Grant
    Filed: April 24, 2019
    Date of Patent: August 18, 2020
    Assignee: Honeywell International Inc.
    Inventors: Vanathi Ravindran, Kamalraja Ganesan, Prashant Pathak
  • Publication number: 20200123630
    Abstract: A process for producing dual phase steel sheet including steps of making a liquid steel having a chemical composition in wt % of C: 0.03-0.12. Mn: 0.8-1.5. Si: <0.1, Cr: 0.3-0.7, S: 0.008 maximum, P: 0.025 maximum, Al: 0.01 to 0.1, N: 0.007 maximum. Nb: 0.005-0.035. and V: 0.06 maximum, remainder Fe; continuous casting the liquid steel into a slab; hot rolling the slab into a hot rolled sheet at finish rolling temperature (FRT) 840±30 ° C.; cooling the hot rolled sheet on the run out table at a cooling rate 40 ?70° C./s to an intermediate temperature (Tint) of 720° C.?Tint?650° C.; natural cooling the hot rolled sheet for a duration of 5-7 seconds and rapidly cooling the hot rolled sheet to transform remaining carbon enriched austenite to martensite, at cooling rate of 40-70 ° C./s to a coiling temperature below 400° C.
    Type: Application
    Filed: May 10, 2017
    Publication date: April 23, 2020
    Inventors: Appa Rao Chintha, Kundu Saurabh, Prashant Pathak, Sushil Kumar Giri, Soumendu Monia, Subhankar Das Bakshi, G. Senthil Kumar, Vinay V. Mahashabde
  • Patent number: 10185801
    Abstract: A method may include obtaining a design including cells and a power grid. The method may further include dividing the design into tiles, determining a voltage budget for a tile, calculating a voltage drop for each cell of the tile based on determining an activity factor for the cell and a peak current consumed by the cell, determining, for each cell of the tile and based on the power grid, an affected vicinity for the cell including one or more neighboring cells affected by a current drawn on the cell, determining an affected vicinity for the tile based on the affected vicinity for each cell of the subset, calculating a voltage drop for the tile based on the voltage drop for each cell of the affected vicinity for the tile, and detecting a voltage deviation when a difference between the voltage budget and the voltage drop exceeds a threshold.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: January 22, 2019
    Assignee: Oracle International Corporation
    Inventors: Kiran Kishore Vedantam, Aparna Ramachandran, James Ballard, Mark Russell O'brien, Sampanna Prashant Pathak
  • Publication number: 20180203971
    Abstract: A method may include obtaining a design including cells and a power grid. The method may further include dividing the design into tiles, determining a voltage budget for a tile, calculating a voltage drop for each cell of the tile based on determining an activity factor for the cell and a peak current consumed by the cell, determining, for each cell of the tile and based on the power grid, an affected vicinity for the cell including one or more neighboring cells affected by a current drawn on the cell, determining an affected vicinity for the tile based on the affected vicinity for each cell of the subset, calculating a voltage drop for the tile based on the voltage drop for each cell of the affected vicinity for the tile, and detecting a voltage deviation when a difference between the voltage budget and the voltage drop exceeds a threshold.
    Type: Application
    Filed: January 18, 2017
    Publication date: July 19, 2018
    Inventors: Kiran Kishore Vedantam, Aparna Ramachandran, James Ballard, Mark Russell O'brien, Sampanna Prashant Pathak
  • Publication number: 20180187283
    Abstract: A process for making a hot rolled high strength steel (HRHSS) product including the steps of casting a steel slab having, in weight percent, C: 0.18-0.22, Mn: 1.0-2.0, Si: 0.8-1.2, Cr: 0.8-1.2, S: 0.008 max, P: 0.025 max, Al: 0.01-0.15, N: 0.005 max, Nb: 0.02-0.035, Mo: 0.08-0.12, the remainder iron (Fe) and incidental impurities, hot rolling the steel slab into strip at a finish rolling temperature (FRT) of 850-900° C., cooling the hot rolled strip at 40° C./s or more over a run out table (ROT) until the strip reaches 380-400° C., coiling the hot rolled strip, and then air cooling to room temperature.
    Type: Application
    Filed: January 23, 2017
    Publication date: July 5, 2018
    Inventors: Appa Rao Chintha, Monideepa Mukherjee, Prashant Pathak, Tapas Chanda, Gyanaranjan Mishra