Patents by Inventor Prashant S. Rawat

Prashant S. Rawat has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Partitioning in a compiler flow for a heterogeneous multi-core architecture
    Patent number: 10872057
    Abstract: An example method of placing kernels of an application in a data processing engine array (DPE) of a system on chip (SOC) includes obtaining a graph of the application having nodes representing the kernels and edges representing communication between the kernels, sorting the kernels based on runtime ratio associated with each of the kernels, processing the sorted kernels sequentially to place into partitions, determining an execution order of kernels in each of the partitions; and generating implementation data for the SOC for implementing the application therein based on the determined partitions and execution order for each of the partitions.
    Type: Grant
    Filed: May 23, 2019
    Date of Patent: December 22, 2020
    Assignee: XILINX, INC.
    Inventors: Prashant S. Rawat, Shail Aditya Gupta