Patents by Inventor Prashant Saxena
Prashant Saxena has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11920459Abstract: A method for drilling a subterranean wellbore includes rotating a drill string in the subterranean wellbore to drill the wellbore. The drill string includes a rotary steerable tool or a steerable drill bit including at least first and second axially spaced pads configured to extend radially outward from a tool body and engage a wall of the wellbore. Radial displacements of each of the first and second axially spaced pads are measured while drilling. The measured radial displacements are processed to compute a rate of penetration of drilling.Type: GrantFiled: December 9, 2020Date of Patent: March 5, 2024Assignee: SCHLUMBERGER TECHNOLOGY CORPORATIONInventors: Ling Li, Riadh Boualleg, Denis Li, Prashant Saxena, Kjell Haugvaldstad
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Publication number: 20230025427Abstract: A method for drilling a subterranean wellbore includes rotating a drill string in the subterranean wellbore to drill the wellbore. The drill string includes a rotary steerable tool or a steerable drill bit including at least first and second axially spaced pads configured to extend radially outward from a tool body and engage a wall of the wellbore. Radial displacements of each of the first and second axially spaced pads are measured while drilling. The measured radial displacements are processed to compute a rate of penetration of drilling.Type: ApplicationFiled: December 9, 2020Publication date: January 26, 2023Inventors: Ling Li, Riadh Boualleg, Denis Li, Prashant Saxena, Kjell Haugvaldstad
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Patent number: 11425059Abstract: A device receives, based on a user interaction with a chatbot, request data for a request for a service associated with a software tool that is part of a service management system. The device identifies, based on the request data, the service that is being requested and a first set of entity data for a first set of entities relating to the service. The device obtains a second set of entity data for a second set of entities by using an application programming interface (API) to reference a data structure that is associated with the service management system and that stores the second set of entity data. The device causes one or more components of the service management system to use the first set of entity data to execute a set of actions to perform the service.Type: GrantFiled: June 18, 2019Date of Patent: August 23, 2022Assignee: Accenture Global Solutions LimitedInventors: Amrish Joshi, Sanjoy Ghosh, Vedika Vinay Sawant, Prashant Saxena
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Patent number: 11280187Abstract: A method for drilling a wellbore through a subterranean formation includes rotating a drill string in the subterranean wellbore to drill. The drill string includes a rotary steerable tool or a steerable drill bit including a plurality of pads configured to extend radially outward from a tool body and engage a wall of the wellbore. Radial displacements of at least one of the pads are measured while rotating (e.g., drilling). A formation index is computed while drilling by processing the measured radial displacements, where the formation index is indicative of a strength or hardness of the subterranean formation.Type: GrantFiled: December 18, 2020Date of Patent: March 22, 2022Assignee: SCHLUMBERGER TECHNOLOGY CORPORATIONInventors: Riadh Boualleg, Steven G. Villareal, Joffroy Urbain, Ling Li, Denis Li, Prashant Saxena, Kjell Haugvaldstad
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Patent number: 11194819Abstract: A feature importance score for a target machine learning feature of a target machine learning model used in a multistage feed ranking system for scoring feed items is supplemented with a feature computing resource cost. The feature computing resource cost represents the cost of using the target feature in the target model in terms of computing resources such as CPU, memory, network resources, etc. A tradeoff between feature importance and feature computing resource cost can be made to decide whether to have the target machine learning model use or not use the target machine learning feature in production, thereby improving the production multistage feed item ranking system and solving the technical problem of determining which machine learning features of a machine learning model represent the best tradeoff between feature importance and feature computing resource cost.Type: GrantFiled: June 27, 2019Date of Patent: December 7, 2021Assignee: Microsoft Technology Licensing, LLCInventors: Madhulekha Arunmozhi, Ian Ackerman, Manas Somaiya, Prashant Saxena
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Patent number: 11194949Abstract: A routability optimization engine comprising a hotspot prediction engine to predict locations of a plurality of hotspots in a circuit layout based on a machine learning system, a white space calculator to calculate white space around each of the plurality of hotspots, and a cell spreader engine to redistribute white space around each of the plurality of hotspots to improve routability of the circuit layout.Type: GrantFiled: February 22, 2018Date of Patent: December 7, 2021Assignee: Synopsys, Inc.Inventors: Prashant Saxena, Wei-Ting Chan, Pei-Hsin Ho
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Publication number: 20210189875Abstract: A method for drilling a wellbore through a subterranean formation includes rotating a drill string in the subterranean wellbore to drill. The drill string includes a rotary steerable tool or a steerable drill bit including a plurality of pads configured to extend radially outward from a tool body and engage a wall of the wellbore. Radial displacements of at least one of the pads are measured while rotating (e.g., drilling). A formation index is computed while drilling by processing the measured radial displacements, where the formation index is indicative of a strength or hardness of the subterranean formation.Type: ApplicationFiled: December 18, 2020Publication date: June 24, 2021Inventors: Riadh Boualleg, Steven G. Villareal, Joffroy Urbain, Ling Li, Denis Li, Prashant Saxena, Kjell Haugvaldstad
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Publication number: 20200409961Abstract: A feature importance score for a target machine learning feature of a target machine learning model used in a multistage feed ranking system for scoring feed items is supplemented with a feature computing resource cost. The feature computing resource cost represents the cost of using the target feature in the target model in terms of computing resources such as CPU, memory, network resources, etc. A tradeoff between feature importance and feature computing resource cost can be made to decide whether to have the target machine learning model use or not use the target machine learning feature in production, thereby improving the production multistage feed item ranking system and solving the technical problem of determining which machine learning features of a machine learning model represent the best tradeoff between feature importance and feature computing resource cost.Type: ApplicationFiled: June 27, 2019Publication date: December 31, 2020Inventors: Madhulekha Arunmozhi, Ian Ackerman, Manas Somaiya, Prashant Saxena
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Publication number: 20200403944Abstract: A device receives, based on a user interaction with a chatbot, request data for a request for a service associated with a software tool that is part of a service management system. The device identifies, based on the request data, the service that is being requested and a first set of entity data for a first set of entities relating to the service. The device obtains a second set of entity data for a second set of entities by using an application programming interface (API) to reference a data structure that is associated with the service management system and that stores the second set of entity data. The device causes one or more components of the service management system to use the first set of entity data to execute a set of actions to perform the service.Type: ApplicationFiled: June 18, 2019Publication date: December 24, 2020Inventors: Armish JOSHI, Sanjoy GHOSH, Vedika Vinay SAWANT, Prashant SAXENA
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Publication number: 20180121237Abstract: Performance of a virtual machine system is improved by avoiding and/or eliminating bottlenecks in read and write operations. The system analyzes current virtualized workloads and provides working set estimates for individual VMs, hosts, and clusters. The working set estimate data is then utilized to make specific recommendations for different types of backend storage technologies. After procuring a storage device, the system provides a variety of information to aid in the operation of the system. From this information, the system can detect various scenarios and proactively make recommendations to the user about ways in which to improve storage performance at a host level and at a per-VM level. In some embodiments, these recommendations may be implemented automatically without user involvement.Type: ApplicationFiled: October 24, 2017Publication date: May 3, 2018Inventors: Bryan Jeffrey Crowe, Satyam B. Vaghani, Akhilesh Joshi, Shyan-Ming Perng, Snehal Mundle, Chethan Kumar, Sandeep Reddy Goli, Prashant Saxena
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Patent number: 9189583Abstract: Systems and techniques are described for performing buffer tree synthesis. Some embodiments create a lookup table based on information contained in a cell library. The lookup table is then used during buffer tree synthesis.Type: GrantFiled: December 23, 2013Date of Patent: November 17, 2015Assignee: SYNOPSYS, INC.Inventors: Sanjay Dhar, Kok Kiong Lee, Sanjay V. Kumar, Prashant Saxena, Robert L. Walker
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Publication number: 20140181765Abstract: Systems and techniques are described for performing buffer tree synthesis. Some embodiments create a lookup table based on information contained in a cell library. The lookup table is then used during buffer tree synthesis.Type: ApplicationFiled: December 23, 2013Publication date: June 26, 2014Applicant: Synopsys, Inc.Inventors: Sanjay Dhar, Kok Kiong Lee, Sanjay V. Kumar, Prashant Saxena, Robert L. Walker
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Patent number: 8266563Abstract: A multi-mode redundancy removal method is provided. In this method, after accessing the design, a full-scale redundancy removal using fault simulation can be started. When a predetermined period for performing the full-scale redundancy removal has reached a first cut-off, then the method can determine a location for temporary outputs of the design, create the temporary outputs, and perform a localized redundancy removal up to the temporary outputs. An optimized design based on the full-scale redundancy removal and the localized redundancy removal can be output.Type: GrantFiled: November 24, 2009Date of Patent: September 11, 2012Assignee: Synopsys, Inc.Inventors: Stephen M. Plaza, Prashant Saxena, Pei-Hsin Ho, Thomas R. Shiple
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Publication number: 20110126167Abstract: A multi-mode redundancy removal method is provided. In this method, after accessing the design, a full-scale redundancy removal using fault simulation can be started. When a predetermined period for performing the full-scale redundancy removal has reached a first cut-off, then the method can determine a location for temporary outputs of the design, create the temporary outputs, and perform a localized redundancy removal up to the temporary outputs. An optimized design based on the full-scale redundancy removal and the localized redundancy removal can be output.Type: ApplicationFiled: November 24, 2009Publication date: May 26, 2011Applicant: Synopsys, Inc.Inventors: Stephen M. Plaza, Prashant Saxena, Pei-Hsin Ho, Thomas R. Shiple
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Patent number: 7853915Abstract: A persistence-driven optimization technique is provided in which nets can be ranked based on unpredictability and likely quality of result impact. The top nets in that ranking can be routed and their parasitics extracted. A timing graph can be back-annotated with route-based delays and parasitics for the selected nets. At this point, synthesis can be run using actual route-based delays and parasitics for the selected nets, with their routes being updated incrementally as needed. In one embodiment, the nets can be re-ranked after synthesis. Finally, these routes can be preserved across the subsequent global routing of the remaining nets.Type: GrantFiled: June 24, 2008Date of Patent: December 14, 2010Assignee: Synopsys, Inc.Inventors: Prashant Saxena, Vishal Khandelwal, Changge Qiao, Pei-Hsin Ho, Jing C. Lin, Mahesh A. Iyer
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Publication number: 20090319977Abstract: A persistence-driven optimization technique is provided in which nets can be ranked based on unpredictability and likely quality of result impact. The top nets in that ranking can be routed and their parasitics extracted. A timing graph can be back-annotated with route-based delays and parasitics for the selected nets. At this point, synthesis can be run using actual route-based delays and parasitics for the selected nets, with their routes being updated incrementally as needed. In one embodiment, the nets can be re-ranked after synthesis. Finally, these routes can be preserved across the subsequent global routing of the remaining nets.Type: ApplicationFiled: June 24, 2008Publication date: December 24, 2009Applicant: Synopsys, Inc.Inventors: Prashant Saxena, Vishal Khandelwal, Changge Qiao, Pei-Hsin Ho, Jing C. Lin, Mahesh A. Iyer
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Patent number: 7266792Abstract: According to some embodiments, a noise problem is automatically analyzed within the context of a cell-based integrated circuit design to identify an adjustment to the design in view of the perturbation to the design caused by the adjustment.Type: GrantFiled: December 16, 2003Date of Patent: September 4, 2007Assignee: Intel CorporationInventors: Prashant Saxena, Kumar N. Lalgudi
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Patent number: 7197736Abstract: Described herein are two techniques referred to as “Adaptive Power Routing” and “Shield Sharing To Reduce Shield Count,” that allow power routing and signal routing to be integrated in a manner that provides more efficient and compact layout of design blocks as compared to traditional techniques. Adaptive power routing refers to completion of power routing to be postponed to the signal routing phase, at which time signal shielding requirements are also used to complete the power routing along with predefined power delivery constraints. Shield sharing optimization refers to the more efficient use of previously routed power lines and to the insertion of a reduced number of additional power lines so as to satisfy both shielding requirements and power supply requirements in a gridless environment.Type: GrantFiled: June 30, 2003Date of Patent: March 27, 2007Assignee: Intel CorporationInventors: Prashant Saxena, Satyanarayan Gupta
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Patent number: 7171634Abstract: Provided are a method, system, and program for processing and verifying circuit designs. A circuit design specification written in a hardware definition language is received and zero delay black box code is added to the circuit design specification to position the zero delay black boxes at sequential elements. A synthesis of the circuit design specification is performed to generate a retimed implementation of the circuit design specification. The black boxes are processed in the retimed implementation to verify the synthesis of the circuit design.Type: GrantFiled: June 28, 2004Date of Patent: January 30, 2007Assignee: Intel CorporationInventors: Prashant S. Sawkar, Bala K. Iyer, Silvian Goldenberg, Prashant Saxena
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Publication number: 20050289498Abstract: Provided are a method, system, and program for processing and verifying circuit designs. A circuit design specification written in a hardware definition language is received and zero delay black box code is added to the circuit design specification to position the zero delay black boxes at sequential elements. A synthesis of the circuit design specification is performed to generate a retimed implementation of the circuit design specification. The black boxes are processed in the retimed implementation to verify the synthesis of the circuit design.Type: ApplicationFiled: June 28, 2004Publication date: December 29, 2005Inventors: Prashant Sawkar, Bala Iyer, Silvian Goldenberg, Prashant Saxena