Patents by Inventor Prashant Srinivasrao Sawkar

Prashant Srinivasrao Sawkar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Computer program product for enabling a computer to remove redundancies using quasi algebraic methods
    Patent number: 5774369
    Abstract: A method is provided to remove redundancies in multi-level logic networks caused by reconverging signals at Boolean sum and product nodes. Generally, sum and product nodes which have potential redundancies are first identified. For each reconvergent signal at each of the nodes, it is determined whether it introduces redundancies using nondestructive Boolean analysis. No two-level expansion is made of the logic network. Moreover, for each confirmed redundancy, a redundant term is identified using Boolean analysis. Finally, the redundancy is removed, if desirable.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: June 30, 1998
    Assignee: International Business Machines Corporation
    Inventors: Paul William Horstmann, Thomas Edward Rosser, Prashant Srinivasrao Sawkar