Patents by Inventor Prashant Wadhwa

Prashant Wadhwa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12176408
    Abstract: A transistor includes a first channel layer over a second channel layer, an epitaxial source structure coupled to a first end of the first and second channel layers and an epitaxial drain structure coupled to a second end of the first and second channel layers. The transistor includes a gate between the epitaxial source structure and the epitaxial drain structure, where the gate is above the first channel layer and between the first channel layer and the second channel layer. The transistor includes a first spacer of a first material, between the first and second channel layers includes. The first spacer has at least one convex sidewall that is between the gate and the epitaxial source structure and between the gate and the epitaxial drain structure. The transistor also includes a second spacer of a second material having substantially vertical sidewalls above the first channel layer.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: December 24, 2024
    Assignee: Intel Corporation
    Inventors: Sudipto Naskar, Willy Rachmady, Hsin-Fen Li, Christopher Parker, Prashant Wadhwa, Tahir Ghani, Mohammad Hasan, Jianqiang Lin
  • Publication number: 20240332301
    Abstract: Integrated circuit structures having sub-fin isolation, and methods of fabricating integrated circuit structures having sub-fin isolation, are described. For example, an integrated circuit structure includes a channel structure, and an oxide sub-fin structure over the channel structure, the oxide sub-fin structure including silicon and oxygen and aluminum.
    Type: Application
    Filed: April 2, 2023
    Publication date: October 3, 2024
    Inventors: Willy RACHMADY, Caleb BARRETT, Prashant WADHWA, Chun-Kuo HUANG, Conor P. PULS, Daniel James HARRIS, Giorgio MARIOTTINI, Patrick MORROW
  • Patent number: 11532619
    Abstract: Transistor structures including a non-planar body that has an active portion comprising a semiconductor material of a first height that is variable, and an inactive portion comprising an oxide of the semiconductor material of a second variable height, complementary to the first height. Gate electrodes and source/drain terminals may be coupled through a transistor channel having any width that varies according to the first height. Oxidation of a semiconductor material may be selectively catalyzed to convert a desired portion of a non-planar body into the oxide of the semiconductor material. Oxidation may be enhanced through the application of a catalyst, such as one comprising metal and oxygen, for example.
    Type: Grant
    Filed: March 27, 2019
    Date of Patent: December 20, 2022
    Assignee: Intel Corporation
    Inventors: Willy Rachmady, Cheng-Ying Huang, Gilbert Dewey, Jack Kavalieros, Caleb Barrett, Jay P. Gupta, Nishant Gupta, Kaiwen Hsu, Byungki Jung, Aravind S. Killampalli, Justin Railsback, Supanee Sukrittanon, Prashant Wadhwa
  • Publication number: 20220199797
    Abstract: A transistor includes a first channel layer over a second channel layer, an epitaxial source structure coupled to a first end of the first and second channel layers and an epitaxial drain structure coupled to a second end of the first and second channel layers. The transistor includes a gate between the epitaxial source structure and the epitaxial drain structure, where the gate is above the first channel layer and between the first channel layer and the second channel layer. The transistor includes a first spacer of a first material, between the first and second channel layers includes. The first spacer has at least one convex sidewall that is between the gate and the epitaxial source structure and between the gate and the epitaxial drain structure. The transistor also includes a second spacer of a second material having substantially vertical sidewalls above the first channel layer.
    Type: Application
    Filed: December 22, 2020
    Publication date: June 23, 2022
    Applicant: Intel Corporation
    Inventors: Sudipto Naskar, Willy Rachmady, Hsin-Fen Li, Christopher Parker, Prashant Wadhwa, Tahir Ghani, Mohammad Hasan, Jianqiang Lin
  • Publication number: 20200312841
    Abstract: Transistor structures including a non-planar body that has an active portion comprising a semiconductor material of a first height that is variable, and an inactive portion comprising an oxide of the semiconductor material of a second variable height, complementary to the first height. Gate electrodes and source/drain terminals may be coupled through a transistor channel having any width that varies according to the first height. Oxidation of a semiconductor material may be selectively catalyzed to convert a desired portion of a non-planar body into the oxide of the semiconductor material. Oxidation may be enhanced through the application of a catalyst, such as one comprising metal and oxygen, for example.
    Type: Application
    Filed: March 27, 2019
    Publication date: October 1, 2020
    Applicant: Intel Corporation
    Inventors: Willy RACHMADY, Cheng-Ying HUANG, Gilbert DEWEY, Jack KAVALIEROS, Caleb BARRETT, Jay P. GUPTA, Nishant GUPTA, Kaiwen HSU, Byungki JUNG, Aravind S. KILLAMPALLI, Justin RAILSBACK, Supanee SUKRITTANON, Prashant WADHWA
  • Publication number: 20200294969
    Abstract: Disclosed herein are stacked transistors with dielectric between source/drain materials of different strata, as well as related methods and devices. In some embodiments, an integrated circuit structure may include stacked strata of transistors, wherein a dielectric material is between source/drain materials of adjacent strata, and the dielectric material is conformal on underlying source/drain material.
    Type: Application
    Filed: March 15, 2019
    Publication date: September 17, 2020
    Applicant: Intel Corporation
    Inventors: Willy Rachmady, Cheng-Ying Huang, Ehren Mannebach, Anh Phan, Caleb Shuan Chia Barrett, Jay Prakash Gupta, Nishant Gupta, Kaiwen Hsu, Byungki Jung, Srinivasa Aravind Killampalli, Justin Gary Railsback, Supanee Sukrittanon, Prashant Wadhwa