Patents by Inventor Prashanth R. Viswanath

Prashanth R. Viswanath has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10102445
    Abstract: Systems and methods are provided for selecting feature points within an image. A plurality of candidate feature points are identified in the image. A plurality of feature points are selected for each of the plurality of candidate feature points, a plurality of sets of representative pixels. For each set of representative pixels, a representative value is determined as one of a maximum chromaticity value and a minimum chromaticity value from the set of representative pixels. A score is determined for each candidate feature point from the representative values for the plurality of sets of representative pixels associated with the candidate feature point. The feature points are selected according to the determined scores for the plurality of candidate feature points.
    Type: Grant
    Filed: August 28, 2017
    Date of Patent: October 16, 2018
    Assignee: Texas Instruments Incorporated
    Inventors: Kumar Desappan, Prashanth R. Viswanath, Pramod Kumar Swami
  • Publication number: 20170357874
    Abstract: Systems and methods are provided for selecting feature points within an image. A plurality of candidate feature points are identified in the image. A plurality of feature points are selected for each of the plurality of candidate feature points, a plurality of sets of representative pixels. For each set of representative pixels, a representative value is determined as one of a maximum chromaticity value and a minimum chromaticity value from the set of representative pixels. A score is determined for each candidate feature point from the representative values for the plurality of sets of representative pixels associated with the candidate feature point. The feature points are selected according to the determined scores for the plurality of candidate feature points.
    Type: Application
    Filed: August 28, 2017
    Publication date: December 14, 2017
    Inventors: Kumar Desappan, Prashanth R. Viswanath, Pramod Kumar Swami
  • Patent number: 9747507
    Abstract: A ground plane detection system including an imaging device operable to generate at least two images of a scene and an image processing assembly operable to receive the at least two images of the scene and to generate a model of each image and to perform homography computations through use of corresponding features in the models of each image.
    Type: Grant
    Filed: December 11, 2014
    Date of Patent: August 29, 2017
    Assignee: Texas Instruments Incorporated
    Inventors: Prashanth R. Viswanath, Suriya Narayanan L
  • Patent number: 9747515
    Abstract: Systems and methods are provided for selecting feature points within an image. A plurality of candidate feature points are identified in the image. A plurality of feature points are selected for each of the plurality of candidate feature points, a plurality of sets of representative pixels. For each set of representative pixels, a representative value is determined as one of a maximum chromaticity value and a minimum chromaticity value from the set of representative pixels. A score is determined for each candidate feature point from the representative values for the plurality of sets of representative pixels associated with the candidate feature point. The feature points are selected according to the determined scores for the plurality of candidate feature points.
    Type: Grant
    Filed: July 9, 2015
    Date of Patent: August 29, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Kumar Desappan, Prashanth R. Viswanath, Pramod Kumar Swami
  • Patent number: 9652686
    Abstract: This invention enables effective corner detection of pixels of an image using the FAST algorithm using a vector SIMD processor. This invention loads an 8×8 pixel block that includes four 7×7 pixel blocks including the 16 peripheral pixels to be tested for each of four center pixels. This invention rearranges the 64 pixels of the 8×8 block to form a 16 element array for each center pixel preferably using a vector permutation instruction. This invention uses vector SIMD subtraction and compare and vector SIMD addition and compare to make the FAST algorithm comparisons. The N consecutive pixels determinations of the FAST algorithm are made from the results of plural shift and AND operations. The corresponding center pixel is marked a corner or not a corner dependent upon of the results of plural shift and AND operations.
    Type: Grant
    Filed: November 8, 2016
    Date of Patent: May 16, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jayasree Sankaranarayanan, Dipan Kumar Mandal, Prashanth R Viswanath
  • Publication number: 20170076173
    Abstract: This invention enables effective corner detection of pixels of an image using the FAST algorithm using a vector SIMD processor. This invention loads an 8×8 pixel block that includes four 7×7 pixel blocks including the 16 peripheral pixels to be tested for each of four center pixels. This invention rearranges the 64 pixels of the 8×8 block to form a 16 element array for each center pixel preferably using a vector permutation instruction. This invention uses vector SIMD subtraction and compare and vector SIMD addition and compare to make the FAST algorithm comparisons. The N consecutive pixels determinations of the FAST algorithm are made from the results of plural shift and AND operations. The corresponding center pixel is marked a corner or not a corner dependent upon of the results of plural shift and AND operations.
    Type: Application
    Filed: November 8, 2016
    Publication date: March 16, 2017
    Inventors: Jayasree Sankaranarayanan, Dipan Kumar Mandal, Prashanth R. Viswanath
  • Publication number: 20160125257
    Abstract: This invention enables effective corner detection of pixels of an image using the FAST algorithm using a vector SIMD processor. This invention loads an 8×8 pixel block that includes four 7×7 pixel blocks including the 16 peripheral pixels to be tested for each of four center pixels. This invention rearranges the 64 pixels of the 8×8 block to form a 16 element array for each center pixel preferably using a vector permutation instruction. This invention uses vector SIMD subtraction and compare and vector SIMD addition and compare to make the FAST algorithm comparisons. The N consecutive pixels determinations of the FAST algorithm are made from the results of plural shift and AND operations. The corresponding center pixel is marked a corner or not a corner dependent upon of the results of plural shift and AND operations.
    Type: Application
    Filed: December 23, 2014
    Publication date: May 5, 2016
    Inventors: Jayasree Sankaranarayanan, Dipan Kumar Mandal, Prashanth R. Viswanath
  • Publication number: 20160117569
    Abstract: Systems and methods are provided for selecting feature points within an image. A plurality of candidate feature points are identified in the image. A plurality of feature points are selected for each of the plurality of candidate feature points, a plurality of sets of representative pixels. For each set of representative pixels, a representative value is determined as one of a maximum chromaticity value and a minimum chromaticity value from the set of representative pixels. A score is determined for each candidate feature point from the representative values for the plurality of sets of representative pixels associated with the candidate feature point. The feature points are selected according to the determined scores for the plurality of candidate feature points.
    Type: Application
    Filed: July 9, 2015
    Publication date: April 28, 2016
    Inventors: KUMAR DESAPPAN, Prashanth R. Viswanath, Pramod Kumar Swami
  • Publication number: 20150178573
    Abstract: A ground plane detection system including an imaging device operable to generate at least two images of a scene and an image processing assembly operable to receive the at least two images of the scene and to generate a model of each image and to perform homography computations through use of corresponding features in the models of each image.
    Type: Application
    Filed: December 11, 2014
    Publication date: June 25, 2015
    Inventors: Prashanth R. Viswanath, Suriya Narayanan L