Abstract: The invention is used in a virtual machine monitor for a multiprocessing system that includes a virtual memory system. During a software-based processing of a guest instruction, including translating or interpreting a guest instruction, mappings between virtual addresses and physical addresses are retained in memory until processing of the guest instruction is completed. The retained mappings may be cleared after each guest instruction has been processed, or after multiple guest instructions have been processed. Information may also be stored to indicate that an attempt to map a virtual address to a physical address was not successful. The invention may be extended beyond virtual machine monitors to other systems involving the software-based processing of instructions, and beyond multiprocessing systems to other systems involving concurrent access to virtual memory management data.

Abstract: A computer system includes at least one virtual machine that has a plurality of virtual processors all running on an underlying hardware platform. A software interface layer such as a virtual machine monitor establishes traces on primary structures located in a common memory space as needed for the different virtual processors. Whenever any one of the virtual processors generates a trace event, such as accessing a traced structure, then a notification is sent to at least the other virtual processors that have a trace on the accessed primary structure. In some applications, the VMM derives and maintains secondary structures corresponding to the primary structures, such as where the VMM converts, through binary translation, original code intended to run on a virtual processor into code that can be run on an underlying physical processor of the hardware platform. In these applications, the VMM may rederive or invalidate the secondary structures as needed upon receipt of the notification of the trace event.

Abstract: Applications, which consist of one or more files containing executable code and/or data, are stored preferably in unmodified form in a provider system. Separately processable portions of the files contain file structure information as well as actual, processable content. A skeleton of each file, consisting of the file structure information but not the processable content, is stored within a user system, and preferably within a virtual machine, along with access information identifying where the actual content is stored. Whenever the user system, in particular, its operating system, issues a request for access to any file portion whose structure only is stored, then the corresponding content is downloaded via a network, from the provider to the user. A broker system may be included as an intermediary between the provider and the user and may perform such functions as billing and selection of available file providers.

Abstract: System and method are described for program analysis with data caching. Briefly described, in architecture, the system can be implemented as follows. The present invention for program analysis with data caching includes a counter for tracking each time one of a plurality of blocks of code in the computer program is executed. A counter cache stores the plurality of counters of the plurality of blocks of code that are most recently executed. A storage area stores a plurality of counters of the plurality of blocks of code that are not most recently executed code. The present invention can also be viewed as providing a method for providing program analysis with data caching.

Abstract: A method and apparatus for improving the process of determining whether two computer system memory references are exactly dependent. While loop unrolling creates a large number of memory reference pairs which must be analyzed during the data dependence analysis phase of compiler optimization, this invention reduces the computer resources required for this analysis. When two memory references are exactly dependent, the present invention quickly determines the distance between them by an elegant method which uses easily accessible values. Therefore, if two memory references are exactly dependent, and if the distance is an integral greater than zero then the compiler optimizer may re-use the same data in computer memory and thus reduce the need to execute computer register instructions. Alternately, if the two memory references are independent they become candidates for pipeline scheduling. This further reduces the use of computer resources.

Abstract: The inventive system and method determines the availability of spare registers in binary code for use by an instrument or program by conducting a local search of either the immediate block of program code or of successor blocks, depending upon where instrumenting code is to be inserted. When inserting code near the begining the of a block of code, the system checks for available registers within the current block of code after the intended insertion point. A register is considered available if the original program overwrites its contents in a statement succeeding the insertion point without first having read data from this register between the insertion point and the current program statement. The system logs all registers found to be available within the immediate block of code using this approach. When the insertion point is at or near the end of a block of code, the system checks all immediate successor blocks for available registers in the same manmer as for the single block case.

Abstract: A method and apparatus for incrementally updating SSA form after loop unrolling. The incremental SSA tool generates a non-ambiguous new name, in SSA form, for each original name defined in a loop and used outside of the loop after loop unrolling, by using the existing CFG structure for the software code that is created by the compiler. The incremental SSA tool renames the uses in the tails of the loop of a name defined within the loop into new clone names. The incremental SSA tool uses the new clone names created in the tails of the loop to rename other uses outside of the loop, of names that are defined within the loop, into new clone names. Also, the incremental SSA tool reconciles loop unrolled names that are used outside of the loop with the new clone names by creating new incarnation names.

Abstract: Analysis of selected aspects of behavior of an application computer program are studied by instrumenting the program in a manner that does not affect the program behavior. A separate analysis file, called a probe instance file, is created apart from the application being instrumented. Innocuous probes are placed at selected locations in the application program to monitor progress and performance of the program. The probes can be implemented by placing markup specifications in a separate part of the file and checking the markup specifications after execution of each instruction in the application program to see whether a probe location is encountered. If so, execution is halted temporarily, and an instance of the corresponding probe code is appended to the probe instance file. Preferably, the probe bodies, i.e. the probe instance file, is subsequently executed as a separate thread. The application therefore runs at full speed. The probe bodies can be simple C statements or any other set of instructions.

Abstract: Data dependence information is stored in a global or system-wide cache so as to reduce the necessity for repeated analysis of similar array reference pairs in a compiler. The data dependence cache is not limited to compilation of a single file. Rather, it can be accessed and shared by multiple users and over compilation of various files. This scheme is advantageous because of the similarity of array references among many programs. The data dependence cache is maintained and updated by determining a relative value of each record in the cache in a manner reminiscent of LRU techniques familiar to artisans in the hardware memory cache domain. The data dependence cache can be made available to multiple instances of a compiler using file locking techniques, or it can be managed by a separate dependence analysis process that responds to messages from other processes requesting data dependence information.