Patents by Inventor Prathima Kommineni

Prathima Kommineni has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10209918
    Abstract: Migrating memory MMIO from a source I/O adapter of a source computing system to a destination I/O adapter of a destination computing system, includes: collecting, by a source hypervisor of the source computing system, MMIO mapping information, where the source hypervisor supports a logical partition on the source computing system and the logical partition is configured for MMIO operations with the source I/O adapter through an MMU; placing, by a destination hypervisor of the destination computing system, the destination I/O adapter in an error state; migrating the logical partition from the source computing system to the destination computing system; configuring, by the destination hypervisor of the destination computing system, the destination computing system for MMIO with the LPAR utilizing the MMIO mapping information collected by the source hypervisor; and restarting the logical partition on the destination computing system, including recovering, by the logical partition, from the error state.
    Type: Grant
    Filed: November 8, 2017
    Date of Patent: February 19, 2019
    Assignee: International Business Machines Corporation
    Inventors: Jesse P. Arroyo, Charles S. Graham, Prathima Kommineni, Timothy J. Schimke
  • Publication number: 20180293143
    Abstract: Failover of a virtual function exposed by an SR-IOV adapter of a computing system, including: instantiating, by a hypervisor, a standby virtual function in the computing system; detecting a loss of communication between a logical partition and an active virtual function mapped to the logical partition; placing the active virtual function and the standby virtual function in an error state; remapping the logical partition to the standby virtual function; and placing the standby virtual function in an error recovery state.
    Type: Application
    Filed: June 11, 2018
    Publication date: October 11, 2018
    Inventors: JESSE P. ARROYO, CHARLES S. GRAHAM, PRATHIMA KOMMINENI, TIMOTHY J. SCHIMKE
  • Publication number: 20180293140
    Abstract: Live partition mobility in a computing environment that includes a source system and a target system may be carried out by: pausing a logical partition on the source system, wherein the logical partition is mapped to an I/O adapter of the source system; copying, to the target system, configuration information describing the mapping of the logical partition to the I/O adapter; copying, to the target system, the logical partition of the source system; placing an I/O adapter of the target system into an error state; mapping, in dependence upon the configuration information, the logical partition of the target system to the I/O adapter of the target system; placing the I/O adapter of the target system into an error recovery state; and resuming the logical partition on the target system.
    Type: Application
    Filed: June 13, 2018
    Publication date: October 11, 2018
    Inventors: JESSE P. ARROYO, CHARLES S. GRAHAM, PRATHIMA KOMMINENI, TIMOTHY J. SCHIMKE
  • Patent number: 10042720
    Abstract: Live partition mobility in a computing environment that includes a source system and a target system may be carried out by: pausing a logical partition on the source system, wherein the logical partition is mapped to an I/O adapter of the source system; copying, to the target system, configuration information describing the mapping of the logical partition to the I/O adapter; copying, to the target system, the logical partition of the source system; placing an I/O adapter of the target system into an error state; mapping, in dependence upon the configuration information, the logical partition of the target system to the I/O adapter of the target system; placing the I/O adapter of the target system into an error recovery state; and resuming the logical partition on the target system.
    Type: Grant
    Filed: February 22, 2016
    Date of Patent: August 7, 2018
    Assignee: International Business Machines Corporation
    Inventors: Jesse P. Arroyo, Charles S. Graham, Prathima Kommineni, Timothy J. Schimke
  • Patent number: 10042723
    Abstract: Failover of a virtual function exposed by an SR-IOV adapter of a computing system, including: instantiating, by a hypervisor, a standby virtual function in the computing system; detecting a loss of communication between a logical partition and an active virtual function mapped to the logical partition; placing the active virtual function and the standby virtual function in an error state; remapping the logical partition to the standby virtual function; and placing the standby virtual function in an error recovery state.
    Type: Grant
    Filed: February 23, 2016
    Date of Patent: August 7, 2018
    Assignee: International Business Machines Corporation
    Inventors: Jesse P. Arroyo, Charles S. Graham, Prathima Kommineni, Timothy J. Schimke
  • Patent number: 10002018
    Abstract: A computing environment includes a computing system, where the computing system includes a plurality of logical partitions, a hypervisor supporting the plurality of logical partitions, a plurality of SR-IOV adapters, where at least one of the logical partitions is mapped to a virtual function on a first SR-IOV adapter of the plurality of adapters, and where migrating an SR-IOV adapter configuration in the computing environment includes: cloning, on a second SR-IOV adapter, a configuration of the first SR-IOV adapter; placing the second SR-IOV adapter and the virtual function in an error state; remapping the virtual function from the first SR-IOV adapter to the second SR-IOV adapter; and placing the second SR-IOV adapter and the virtual function in an error recovery state.
    Type: Grant
    Filed: February 23, 2016
    Date of Patent: June 19, 2018
    Assignee: International Business Machines Corporation
    Inventors: Manu Anand, Jesse P. Arroyo, Charles S. Graham, Prathima Kommineni, Timothy J. Schimke
  • Publication number: 20180113644
    Abstract: Migrating memory MMIO from a source I/O adapter of a source computing system to a destination I/O adapter of a destination computing system, includes: collecting, by a source hypervisor of the source computing system, MMIO mapping information, where the source hypervisor supports a logical partition on the source computing system and the logical partition is configured for MMIO operations with the source I/O adapter through an MMU; placing, by a destination hypervisor of the destination computing system, the destination I/O adapter in an error state; migrating the logical partition from the source computing system to the destination computing system; configuring, by the destination hypervisor of the destination computing system, the destination computing system for MMIO with the LPAR utilizing the MMIO mapping information collected by the source hypervisor; and restarting the logical partition on the destination computing system, including recovering, by the logical partition, from the error state.
    Type: Application
    Filed: November 8, 2017
    Publication date: April 26, 2018
    Inventors: JESSE P. ARROYO, CHARLES S. GRAHAM, PRATHIMA KOMMINENI, TIMOTHY J. SCHIMKE
  • Publication number: 20180113823
    Abstract: Migrating interrupts from a source I/O adapter of a computing system to a destination I/O adapter of the computing system, includes: collecting, by a hypervisor of the computing system, interrupt mapping information, where the hypervisor supports operation of a logical partition executing and the logical partition is configured to receive interrupts from the source I/O adapter; configuring, by the hypervisor, the destination I/O adapter with the interrupt mapping information collected by the hypervisor; placing, by the hypervisor, the destination I/O adapter and the source I/O in an error state; deconfiguring the source I/O adapter from the logical partition; and enabling the logical partition and destination I/O adapter to recover from the error state.
    Type: Application
    Filed: November 9, 2017
    Publication date: April 26, 2018
    Inventors: JESSE P. ARROYO, CHARLES S. GRAHAM, PRATHIMA KOMMINENI, TIMOTHY J. SCHIMKE
  • Patent number: 9916267
    Abstract: Migrating interrupts from a source I/O adapter of a source computing system to a destination I/O adapter of a destination computing system, includes: collecting, by a source hypervisor of the source computing system, interrupt mapping information, were the source hypervisor supports operation of a logical partition executing on the source computing system and the logical partition is configured to receive interrupts from the source I/O adapter; configuring, by the destination hypervisor of the destination computing system, the destination computing system with the interrupt mapping information collected by the source hypervisor; placing, by a destination hypervisor of the destination computing system, the destination I/O adapter in an error state; migrating the logical partition from the source computing system to the destination computing system; and restarting the logical partition on the destination computing system, including recovering, by the logical partition, from the error state.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: March 13, 2018
    Assignee: International Business Machines Corporation
    Inventors: Jesse P. Arroyo, Charles S. Graham, Prathima Kommineni, Timothy J. Schimke
  • Patent number: 9892070
    Abstract: Migrating interrupts from a source I/O adapter of a computing system to a destination I/O adapter of the computing system, includes: collecting, by a hypervisor of the computing system, interrupt mapping information, where the hypervisor supports operation of a logical partition executing and the logical partition is configured to receive interrupts from the source I/O adapter; configuring, by the hypervisor, the destination I/O adapter with the interrupt mapping information collected by the hypervisor; placing, by the hypervisor, the destination I/O adapter and the source I/O in an error state; deconfiguring the source I/O adapter from the logical partition; and enabling the logical partition and destination I/O adapter to recover from the error state.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: February 13, 2018
    Assignee: International Business Machines Corporation
    Inventors: Jesse P. Arroyo, Charles S. Graham, Prathima Kommineni, Timothy J. Schimke
  • Patent number: 9875060
    Abstract: Migrating memory MMIO from a source I/O adapter of a source computing system to a destination I/O adapter of a destination computing system, includes: collecting, by a source hypervisor of the source computing system, MMIO mapping information, where the source hypervisor supports a logical partition on the source computing system and the logical partition is configured for MMIO operations with the source I/O adapter through an MMU; placing, by a destination hypervisor of the destination computing system, the destination I/O adapter in an error state; migrating the logical partition from the source computing system to the destination computing system; configuring, by the destination hypervisor of the destination computing system, the destination computing system for MMIO with the LPAR utilizing the MMIO mapping information collected by the source hypervisor; and restarting the logical partition on the destination computing system, including recovering, by the logical partition, from the error state.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: January 23, 2018
    Assignee: International Business Machines Corporation
    Inventors: Jesse P. Arroyo, Charles S. Graham, Prathima Kommineni, Timothy J. Schimke
  • Patent number: 9830171
    Abstract: Migrating MMIO from a source I/O adapter of a computing system to a destination I/O adapter of the computing system, includes: collecting, by a hypervisor of the computing system, MMIO mapping information, wherein the hypervisor supports operation of a logical partition executing and the logical partition is configured for MMIO operations with the source I/O adapter through a MMU of the computing system utilizing the MMIO mapping information; placing, by the hypervisor, the destination I/O adapter in an error state; configuring, by the hypervisor, the MMU for MMIO with the logical partition utilizing the MMIO mapping information collected by the hypervisor; and enabling the destination I/O adapter to recover from the error state.
    Type: Grant
    Filed: June 8, 2017
    Date of Patent: November 28, 2017
    Assignee: International Business Machines Corporation
    Inventors: Jesse P. Arroyo, Charles S. Graham, Prathima Kommineni, Timothy J. Schimke
  • Patent number: 9785451
    Abstract: Migrating MMIO from a source I/O adapter of a computing system to a destination I/O adapter of the computing system, includes: collecting, by a hypervisor of the computing system, MMIO mapping information, wherein the hypervisor supports operation of a logical partition executing and the logical partition is configured for MMIO operations with the source I/O adapter through a MMU of the computing system utilizing the MMIO mapping information; placing, by the hypervisor, the destination I/O adapter in an error state; configuring, by the hypervisor, the MMU for MMIO with the logical partition utilizing the MMIO mapping information collected by the hypervisor; and enabling the destination I/O adapter to recover from the error state.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: October 10, 2017
    Assignee: International Business Machines Corporation
    Inventors: Jesse P. Arroyo, Charles S. Graham, Prathima Kommineni, Timothy J. Schimke
  • Patent number: 9760512
    Abstract: A method of migrating DMA mappings from a source I/O adapter of a source computing system to a destination I/O adapter of a destination computing system, including: collecting, by a source hypervisor of the source computing system, DMA mapping information, wherein the source hypervisor supports operation of a logical partition executing on the source computing system and the logical partition is configured for DMA operations with the source I/O adapter utilizing the DMA mapping information; configuring, by a destination hypervisor of the destination computing system, the destination I/O adapter with DMA mappings based on the DMA mapping information collected by the source hypervisor; placing, by the destination hypervisor, the destination I/O adapter in an error state; migrating the logical partition from the source computing system to the destination computing system; and restarting the logical partition on the destination computing system, including recovering, by the logical partition, from the error state
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: September 12, 2017
    Assignee: International Business Machines Corporation
    Inventors: Jesse P. Arroyo, Charles S. Graham, Prathima Kommineni, Timothy J. Schimke
  • Publication number: 20170242720
    Abstract: A computing environment includes a computing system, where the computing system includes a plurality of logical partitions, a hypervisor supporting the plurality of logical partitions, a plurality of SR-IOV adapters, where at least one of the logical partitions is mapped to a virtual function on a first SR-IOV adapter of the plurality of adapters, and where migrating an SR-IOV adapter configuration in the computing environment includes: cloning, on a second SR-IOV adapter, a configuration of the first SR-IOV adapter; placing the second SR-IOV adapter and the virtual function in an error state; remapping the virtual function from the first SR-IOV adapter to the second SR-IOV adapter; and placing the second SR-IOV adapter and the virtual function in an error recovery state.
    Type: Application
    Filed: February 23, 2016
    Publication date: August 24, 2017
    Inventors: MANU ANAND, JESSE P. ARROYO, CHARLES S. GRAHAM, PRATHIMA KOMMINENI, TIMOTHY J. SCHIMKE
  • Publication number: 20170242756
    Abstract: Live partition mobility in a computing environment that includes a source system and a target system may be carried out by: pausing a logical partition on the source system, wherein the logical partition is mapped to an I/O adapter of the source system; copying, to the target system, configuration information describing the mapping of the logical partition to the I/O adapter; copying, to the target system, the logical partition of the source system; placing an I/O adapter of the target system into an error state; mapping, in dependence upon the configuration information, the logical partition of the target system to the I/O adapter of the target system; placing the I/O adapter of the target system into an error recovery state; and resuming the logical partition on the target system.
    Type: Application
    Filed: February 22, 2016
    Publication date: August 24, 2017
    Inventors: JESSE P. ARROYO, CHARLES S. GRAHAM, PRATHIMA KOMMINENI, TIMOTHY J. SCHIMKE
  • Publication number: 20170242763
    Abstract: Failover of a virtual function exposed by an SR-IOV adapter of a computing system, including: instantiating, by a hypervisor, a standby virtual function in the computing system; detecting a loss of communication between a logical partition and an active virtual function mapped to the logical partition; placing the active virtual function and the standby virtual function in an error state; remapping the logical partition to the standby virtual function; and placing the standby virtual function in an error recovery state.
    Type: Application
    Filed: February 23, 2016
    Publication date: August 24, 2017
    Inventors: JESSE P. ARROYO, CHARLES S. GRAHAM, PRATHIMA KOMMINENI, TIMOTHY J. SCHIMKE
  • Patent number: 9740647
    Abstract: Migrating DMA mappings from a source I/O adapter of a computing system to a destination I/O adapter of the computing system, includes: collecting, by a hypervisor of the computing system, DMA mapping information, where the hypervisor supports operation of a logical partition executing on the computing system and the logical partition is configured for DMA operations with the source I/O adapter utilizing the DMA mapping information; configuring, by the hypervisor, the destination I/O adapter with DMA mappings based on the DMA mapping information collected by the hypervisor; placing, by the hypervisor, the source and destination I/O adapter in an error state; deconfiguring the source I/O adapter from the logical partition; and enabling the logical partition and destination I/O adapter to recover from the error state.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: August 22, 2017
    Assignee: International Business Machines Corporation
    Inventors: Jesse P. Arroyo, Charles S. Graham, Prathima Kommineni, Timothy J. Schimke
  • Patent number: 9720862
    Abstract: Migrating interrupts from a source I/O adapter of a computing system to a destination I/O adapter of the computing system, includes: collecting, by a hypervisor of the computing system, interrupt mapping information, where the hypervisor supports operation of a logical partition executing and the logical partition is configured to receive interrupts from the source I/O adapter; configuring, by the hypervisor, the destination I/O adapter with the interrupt mapping information collected by the hypervisor; placing, by the hypervisor, the destination I/O adapter and the source I/O in an error state; deconfiguring the source I/O adapter from the logical partition; and enabling the logical partition and destination I/O adapter to recover from the error state.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: August 1, 2017
    Assignee: International Business Machines Corporation
    Inventors: Jesse P. Arroyo, Charles S. Graham, Prathima Kommineni, Timothy J. Schimke
  • Patent number: 9720863
    Abstract: Migrating memory MMIO from a source I/O adapter of a source computing system to a destination I/O adapter of a destination computing system, includes: collecting, by a source hypervisor of the source computing system, MMIO mapping information, where the source hypervisor supports a logical partition on the source computing system and the logical partition is configured for MMIO operations with the source I/O adapter through an MMU; placing, by a destination hypervisor of the destination computing system, the destination I/O adapter in an error state; migrating the logical partition from the source computing system to the destination computing system; configuring, by the destination hypervisor of the destination computing system, the destination computing system for MMIO with the LPAR utilizing the MMIO mapping information collected by the source hypervisor; and restarting the logical partition on the destination computing system, including recovering, by the logical partition, from the error state.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: August 1, 2017
    Assignee: International Business Machines Corporation
    Inventors: Jesse P. Arroyo, Charles S. Graham, Prathima Kommineni, Timothy J. Schimke