Patents by Inventor Praveen Suresh

Praveen Suresh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11658574
    Abstract: An IC controller for a USB Type-C device includes a register that is programmable to store a pulse width and a frequency. A buck-boost converter of the controller includes a first high-side switch and a second high-side switch. Control logic is coupled to the register and gates of the first/second high-side switches. To perform a soft start in one of buck mode or boost mode, the control logic: causes the second high-side switch to operate in diode mode; retrieves values of the pulse width and the frequency from the register; causes the first high-side switch to turn on using pulses having the pulse width and at the frequency; detects an output voltage at the output terminal of the buck-boost converter that exceeds a threshold value; and in response to the detection, transfers control of the buck-boost converter to an error amplifier loop coupled to the control logic.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: May 23, 2023
    Assignee: Cypress Semiconductor Corporation
    Inventors: Hariom Rai, Pulkit Shah, Arun Khamesra, Rajesh Karri, Praveen Suresh
  • Patent number: 11625355
    Abstract: A multi-port USB Type-C® Power Delivery (USB-C/PD) power converter for switching clock phase shifts is described herein. The multi-port USB-C/PD power converter includes a first PD port, a second PD port, and a power controller coupled to the first and second PD ports. The power controller includes a first phased clock generator to generate a first phase-shifted clock signal by shifting a clock signal by a first phase with respect to a reference clock signal, and a second phased clock generator to generate a second phase-shifted clock signal to generate a second phased-shifted clock signal by shifting the clock signal by a second phase with respect to the reference clock signal. The first PD port and the second PD port output power in response to a first control signal based on the first phase-shifted clock signal and a second control signal based on the second phase-shifted clock signal, respectively.
    Type: Grant
    Filed: August 24, 2021
    Date of Patent: April 11, 2023
    Assignee: Cypress Semiconductor Corporation
    Inventors: Arun Khamesra, Pulkit Shah, Praveen Suresh, Hariom Rai
  • Publication number: 20220069709
    Abstract: An IC controller for a USB Type-C device includes a register that is programmable to store a pulse width and a frequency. A buck-boost converter of the controller includes a first high-side switch and a second high-side switch. Control logic is coupled to the register and gates of the first/second high-side switches. To perform a soft start in one of buck mode or boost mode, the control logic: causes the second high-side switch to operate in diode mode; retrieves values of the pulse width and the frequency from the register; causes the first high-side switch to turn on using pulses having the pulse width and at the frequency; detects an output voltage at the output terminal of the buck-boost converter that exceeds a threshold value; and in response to the detection, transfers control of the buck-boost converter to an error amplifier loop coupled to the control logic.
    Type: Application
    Filed: May 6, 2021
    Publication date: March 3, 2022
    Applicant: Cypress Semiconductor Corporation
    Inventors: Hariom Rai, Pulkit Shah, Arun Khamesra, Karri Rajesh, Praveen Suresh
  • Publication number: 20220066980
    Abstract: A multi-port USB Power Delivery Type-C (USB-C/PD) power converter for switching clock phase shifts is described herein. The multi-port USB-C/PD power converter includes a first PD port, a second PD port, and a power controller coupled to the first and second PD ports. The power controller includes a first phased clock generator to generate a first phase-shifted clock signal by shifting a clock signal by a first phase with respect to a reference clock signal, and a second phased clock generator to generate a second phase-shifted clock signal to generate a second phased-shifted clock signal by shifting the clock signal by a second phase with respect to the reference clock signal. The first PD port and the second PD port output power in response to a first control signal based on the first phase-shifted clock signal and a second control signal based on the second phase-shifted clock signal, respectively.
    Type: Application
    Filed: August 24, 2021
    Publication date: March 3, 2022
    Applicant: Cypress Semiconductor Corporation
    Inventors: Arun Khamesra, Pulkit Shah, Praveen Suresh, Hariom Rai