Patents by Inventor Praveen Viraraghavan
Praveen Viraraghavan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11550501Abstract: A method for execution by a storage unit in a dispersed storage network (DSN) includes selecting a storage zone of a memory device of the storage unit based on zone allocation parameters, and designating the selected storage zone as open for writes. A data slice is received via a network for storage. The data slice is written sequentially at a memory location of the one of storage zone based on determining that the storage zone is designated as open for writes. A pointer corresponding to the data slice that indicates the storage zone and the memory location is generated. A read request is received via the network from a requesting entity that indicates the data slice. The data slice is retrieved from the memory device based on the pointer, and is transmitted to the requesting entity.Type: GrantFiled: March 30, 2020Date of Patent: January 10, 2023Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Andrew D. Baptist, Manish Motwani, Praveen Viraraghavan, Ilya Volvovski
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Publication number: 20220405003Abstract: Apparatus and method for managing data in a non-volatile memory (NVM) having an array of ferroelectric memory cells (FMEs). A data set received from an external client device is programmed to a group of the FMEs at a target location in the NVM using a selected profile. The selected profile provides different program characteristics, such as applied voltage magnitude and pulse duration, to achieve desired levels of power used during the program operation, endurance of the data set, and latency effects associated with a subsequent read operation to retrieve the data set. The profile may be selected from among a plurality of profiles for different operational conditions. The ferroelectric NVM may form a portion of a solid-state drive (SSD) storage device. Different types of FMEs may be utilized including ferroelectric tunneling junctions (FTJs), ferroelectric random access memory (FeRAM), and ferroelectric field effect transistors (FeFETs).Type: ApplicationFiled: June 15, 2022Publication date: December 22, 2022Inventors: Jon D. Trantham, Praveen Viraraghavan, John W. Dykes, Ian J. Gilbert, Sangita Shreedharan Kalarickal, Matthew J. Totin, Mohamad El-Batal, Darshana H. Mehta
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Publication number: 20220404982Abstract: A data storage system can employ a read destructive memory configured with multiple levels. A non-volatile memory unit can be programmed with a first logical state in response to a first write voltage of a first hysteresis loop by a write controller prior to being programmed to a second logical state in response to a second write voltage of the first hysteresis loop, as directed by the write controller. The first and second logical states may be present concurrently in the non-volatile memory unit and subsequently read concurrently as the first logical state and the second logical state.Type: ApplicationFiled: June 20, 2022Publication date: December 22, 2022Inventors: Jon D. Trantham, Praveen Viraraghavan, John W. Dykes, Ian J. Gilbert, Sangita Shreedharan Kalarickal, Matthew J. Totin, Mohamad El-Batal, Darshana H. Mehta
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Publication number: 20220405208Abstract: A data storage system can employ a read destructive memory configured to fill a first cache with a first data set from a data repository prior to populating a second cache with a second data set describing the first data set with the first and second cache each having non-volatile ferroelectric memory cells. An entirety of the first cache may be read in response to a cache hit in the second cache with the cache hit responsive to a data read command from a host and with the first cache being read without a refresh operation restoring the data of the first cache.Type: ApplicationFiled: June 20, 2022Publication date: December 22, 2022Inventors: Jon D. Trantham, Praveen Viraraghavan, John W. Dykes, Ian J. Gilbert, Sangita Shreedharan Kalarickal, Matthew J. Totin, Mohamad El-Batal, Darshana H. Mehta
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Publication number: 20220406396Abstract: A data storage system can utilize one or more data storage devices that employ a solid-state non-volatile read destructive memory consisting of ferroelectric memory cells. A leveling strategy can be generated by a wear module connected to the memory with the leveling strategy prescribing a plurality of memory cell operating parameters associated with different amounts of cell wear. The wear module may monitor activity of a memory cell and detect an amount of wear in the memory cell as a result of the monitored activity, which can prompt changing a default set of operating parameters for the memory cell to a first stage of operating parameters, as prescribed by the leveling strategy, in response to the detected amount of wear.Type: ApplicationFiled: June 21, 2022Publication date: December 22, 2022Inventors: Jon D. Trantham, Praveen Viraraghavan, John W. Dykes, Ian J. Gilbert, Sangita Shreedharan Kalarickal, Matthew J. Totin, Mohamad El-Batal, Darshana H. Mehta
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Publication number: 20220399054Abstract: A non-volatile memory (NVM) is formed of memory cells each having multiple ferroelectric memory elements (FMEs). Each FME stores data in relation to an electrical polarity of a recording layer formed of ferroelectric or anti-ferroelectric material. Each multi-FME memory cell is coupled to a set of external control lines activated by a control circuit in a selected order to perform program and/or read operations upon the FMEs. The FMEs may share a nominally identical construction or may have different constructions. Data are programmed and written responsive to the respective program/read responses of the FMEs. Constructions can include ferroelectric tunneling junctions (FTJs), ferroelectric random access memory (FeRAM), and ferroelectric field effect transistors (FeFETs). The NVM may form a portion of a data storage device, such as a solid-state drive (SSD).Type: ApplicationFiled: June 15, 2022Publication date: December 15, 2022Inventors: Jon D. Trantham, Praveen Viraraghavan, John W. Dykes, Ian J. Gilbert, Sangita Shreedharan Kalarickal, Matthew J. Totin, Mohamad El-Batal, Darshana H. Mehta
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Publication number: 20220350523Abstract: Apparatus and method for managing data in a processing system, such as but not limited to a data storage device such as a solid-state drive (SSD). A ferroelectric stack register memory has a first arrangement of ferroelectric memory cells (FMEs) of a first construction and a second arrangement of FMEs of a different, second construction arranged to provide respective cache lines for use by a controller, such as a programmable processor. A pointer mechanism is configured to provide pointers to point to each of the respective cache lines based on a time sequence of operation of the processor. Data sets can be migrated to the different arrangements by the controller as required based on the different operational characteristics of the respective FME constructions. The FMEs may be non-volatile and read-destructive. Refresh circuitry can be selectively enacted under different operational modes.Type: ApplicationFiled: April 27, 2022Publication date: November 3, 2022Inventors: Jon D. Trantham, Praveen Viraraghavan, John W. Dykes, Ian J. Gilbert, Sangita Shreedharan Kalarickal, Matthew J. Totin, Mohamad El-Batal, Darshana H. Mehta
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Publication number: 20220350739Abstract: Method and apparatus for managing a front-end cache formed of ferroelectric memory element (FME) cells. Prior to storage of writeback data associated with a pending write command from a client device, an intelligent cache manager circuit forwards a first status value indicative that sufficient capacity is available in the front-end cache for the writeback data. Non-requested speculative readback data previously transferred to the front-end cache from the main NVM memory store may be jettisoned to accommodate the writeback data. A second status value may be supplied to the client device if insufficient capacity is available to store the writeback data in the front-end cache, and a different, non-FME based cache may be used in such case. Mode select inputs can be supplied by the client device specify a particular quality of service level for the front-end cache, enabling selection of suitable writeback and speculative readback data processing strategies.Type: ApplicationFiled: April 27, 2022Publication date: November 3, 2022Inventors: Jon D. Trantham, Praveen Viraraghavan, John W. Dykes, Ian J. Gilbert, Sangita Shreedharan Kalarickal, Matthew J. Totin, Mohamad El-Batal, Darshana H. Mehta
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Publication number: 20220343962Abstract: A system on chip (SOC) integrated circuit device having an incorporated ferroelectric memory configured to be selectively refreshed, or not, depending on different operational modes. The ferroelectric memory is formed of an array of ferroelectric memory elements (FMEs) characterized as non-volatile, read-destructive semiconductor memory cells each having at least one ferroelectric layer. The FMEs can include FeRAM, FeFET or FTJ constructions. A read/write circuit writes data to the FMEs and subsequently reads back data from the FMEs responsive to respective write and read signals supplied by a processor circuit of the SOC. A refresh circuit is selectively enabled in a first normal mode to refresh the FMEs after a read operation, and is selectively disabled in a second exception mode so that the FMEs are not refreshed after a read operation. The FMEs can be used as a main memory, a cache, a buffer, an OTP, a keystore, etc.Type: ApplicationFiled: April 22, 2022Publication date: October 27, 2022Inventors: Jon D. Trantham, Praveen Viraraghavan, John W. Dykes, Ian J. Gilbert, Sangita Shreedharan Kalarickal, Matthew J. Totin, Mohamad El-Batal, Darshana H. Mehta
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Publication number: 20220328086Abstract: A memory device formed of ferroelectric field effect transistors (FeFETs). The memory device can be used as a front end buffer, such as in a data storage device having a non-volatile memory (NVM). A controller can be configured to transfer user data between the NVM and an external client (host) via the buffer. The FeFETs can be arranged in a two-dimensional (2D) or a three-dimensional (3D) array. A monitor circuit can be used to monitor operation of the FeFETs. An optimization controller can be used to adjust at least one operational parameter associated with the FeFETs responsive to the monitored operation by the monitor circuit. The FeFETs may require a refresh operation after each read operation. A power down sequence can involve a read operation without a subsequent refresh operation to wipe the FeFETs, the read operation jettisoning the data read from the buffer memory.Type: ApplicationFiled: April 13, 2022Publication date: October 13, 2022Inventors: Jon D. Trantham, Praveen Viraraghavan, John W. Dykes, Ian J. Gilbert, Sangita Shreedharan Kalarickal, Matthew J. Totin, Mohamad El-Batal, Darshana H. Mehta
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Patent number: 11455100Abstract: A method for execution by a storage unit of a dispersed storage network (DSN) includes receiving a data slice for storage. A first bin that includes the data slice is generated and stored in a first location of a memory device of the storage unit, and a bin pointer that includes a reference to the first location is generated. A revision of the data slice is later received, and a second bin that includes the revised data slice is generated and stored in a second location of the memory device. A modified bin pointer is generated by editing the bin pointer to include a reference to the second location. A back pointer that references the first location is generated in response to commencing writing of the revised data slice. The back pointer is deleted in response to determining that the revised data slice has reached a finalized write stage.Type: GrantFiled: June 25, 2019Date of Patent: September 27, 2022Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Andrew D. Baptist, Manish Motwani, Praveen Viraraghavan, Ilya Volvovski
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Patent number: 11430471Abstract: A disk drive is operable to determine degradation associated with writing to a disk surface by a head which has written existing data at a first areal density. A second areal density less than the first areal density is determined that remediates the degradation. The disk drive performs subsequent writes to the disk surface at the second areal density, and continues to read the existing data at the first areal density.Type: GrantFiled: December 18, 2020Date of Patent: August 30, 2022Assignee: Seagate TechnologyInventors: Drew Allen Cheney, Edward Charles Gage, Praveen Viraraghavan
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Patent number: 11372547Abstract: Methods and systems for compression of aging data during compaction are disclosed. A method includes: ingesting a plurality of data objects into a dispersed storage network (DSN); determining that a compaction threshold is met for a storage medium in the DSN; and compacting the storage medium, the compaction including, for each of the plurality of data objects: determining a number of times the data object has been compacted; in response to the number of times the data object has been compacted exceeding a predetermined threshold, compressing the data object and rewriting the compressed data object to a new area on a storage medium; and in response to the number of times the data object has been compacted not exceeding the predetermined threshold, rewriting the data object to the new area on the storage medium without compressing the data object.Type: GrantFiled: February 13, 2020Date of Patent: June 28, 2022Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Praveen Viraraghavan, Ethan Wozniak, Ilya Volvovski
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Patent number: 11243697Abstract: Technology for choosing a design for a computer data storage system having a prescribed reliability. The selection of a “matching storage system,” matching the prescribed reliability is based on computation of first and second reliability indicators.Type: GrantFiled: January 27, 2021Date of Patent: February 8, 2022Assignee: International Business Machines CorporationInventors: Praveen Viraraghavan, Ilias Iliadis, Mark Alfred Lantz
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Patent number: 11226776Abstract: A method includes: receiving, by a computing device, a data slice for storage in a dispersed storage network; predicting, by the computing device, a modification frequency associated with the data slice; and storing, by the computing device, the data slice in one of a first type zone of a data storage and a second type zone of the data storage based on the predicted modification frequency.Type: GrantFiled: February 28, 2020Date of Patent: January 18, 2022Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jordan Harrison Williams, Benjamin Lee Martin, Ilya Volvovski, Praveen Viraraghavan
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Patent number: 11210159Abstract: A failure detection and correction module (FDCM) uses statistical measurement to detect failures in a distributed computing system caused by hardware, software, workflow, deployment, environmental factors, etc. in a component of the computing system, the computing system, or multiple computing systems and produces corrective actions. The FDCM identifies issues from various components, correlates the estimated failures in each level of components and rolls up failures and estimated failures from each level of components to system level estimations of failures, reevaluates the system reliability factors, readjusts the system reliability and system functions from the adjusted reliability factors, and produces intelligent corrective actions to improve both system reliability and the system efficiency. Corrective action includes changing slice storing parameters and rebuild priorities on a dispersed storage system.Type: GrantFiled: January 6, 2020Date of Patent: December 28, 2021Assignee: International Business Machines CorporationInventors: Ying Zhao Guo, Jason Resch, Niall John McShane, Akiko Sato, Patrick Aaron Tamborski, Gregory A. Papadopoulos, Praveen Viraraghavan
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Patent number: 11204720Abstract: Methods and systems for data retention in zone storage are disclosed. A method includes: ingesting, by a computing device, a plurality of data objects into a dispersed storage network (DSN); writing, by the computing device, the plurality of data objects to at least one zone on a storage medium in the DSN; determining, by the computing device, that a compaction threshold corresponding to the at least one zone on the storage medium in the DSN is met; determining, by the computing device, that a retention window corresponding to the at least one zone on the storage medium in the DSN has expired; and in response to determining that the retention window has expired, the computing device compacting the at least one zone on the storage medium in the DSN.Type: GrantFiled: March 24, 2020Date of Patent: December 21, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Gregory R. Dhuse, Ilya Volvovski, Praveen Viraraghavan, Jordan Harrison Williams
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Patent number: 11182097Abstract: A computer-implemented method includes receiving a plurality of storage requests to store a plurality of objects in a dispersed storage network. The computer-implemented method further includes transforming each object in the plurality of objects into a set of error encoded slices. The computer-implemented method further includes dispersing each error encoded slice in each set of error encoded slices to a memory zone of a distinct storage unit. The computer-implemented method further includes co-locating two or more error encoded slices in a common memory zone of a storage unit based, at least in part, on an expiry time associated with the two or more encoded slices. The computer-implemented method further includes logically deleting the common memory zone of the storage unit after all error encoded slices stored in the common memory zone have expired.Type: GrantFiled: May 14, 2019Date of Patent: November 23, 2021Assignee: International Business Machines CorporationInventors: Praveen Viraraghavan, Ethan Wozniak, Amit Lamba
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Patent number: 11145332Abstract: Systems and methods for proactive transfer of stored data between storage zones to avoid anticipated bit rot are provided. In embodiments, a method includes: determining that one or more quality prediction parameters of a storage zone of a data storage device meet a predetermined threshold for user access or adjacency to another storage zone determined to be unhealthy; and initiating a proactive refreshing of the storage zone based on the determining that the storage zone meets the predetermined threshold, the proactive refreshing of the storage zone including: reading all data in the storage zone; determining that no errors have occurred during the reading of the data; and based on the determination that no errors have occurred, moving all of the data of the storage zone to a new storage zone.Type: GrantFiled: March 5, 2020Date of Patent: October 12, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Ilya Volvovski, Praveen Viraraghavan, Jordan Harrison Williams, Benjamin Lee Martin, Manish Motwani
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Publication number: 20210303200Abstract: Methods and systems for data retention in zone storage are disclosed. A method includes: ingesting, by a computing device, a plurality of data objects into a dispersed storage network (DSN); writing, by the computing device, the plurality of data objects to at least one zone on a storage medium in the DSN; determining, by the computing device, that a compaction threshold corresponding to the at least one zone on the storage medium in the DSN is met; determining, by the computing device, that a retention window corresponding to the at least one zone on the storage medium in the DSN has expired; and in response to determining that the retention window has expired, the computing device compacting the at least one zone on the storage medium in the DSN.Type: ApplicationFiled: March 24, 2020Publication date: September 30, 2021Inventors: Gregory R. Dhuse, Ilya Volvovski, Praveen Viraraghavan, Jordan Harrison Williams