Patents by Inventor Pravesh Gupta

Pravesh Gupta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Enhanced low-priority arbitration
    Patent number: 11675718
    Abstract: A computing system may implement a low priority arbitration interrupt method that includes receiving a message signaled interrupt (MSI) message from an input output hub (I/O hub) transmitted over an interconnect fabric, selecting a processor to interrupt from a cluster of processors based on arbitration parameters, and communicating an interrupt service routine to the selected processor, wherein the I/O hub and the cluster of processors are located within a common domain.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: June 13, 2023
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Eric Christopher Morton, Pravesh Gupta, Bryan P Broussard, Li Ou
  • DEVICE AND METHOD FOR REDUCING SAVE-RESTORE LATENCY USING ADDRESS LINEARIZATION
    Publication number: 20230090126
    Abstract: Devices and methods for transitioning between power states of a device are provided. A program is executed using data stored in configuration registers assigned to a component of a device. For a first reduced power state, data of a first portion of the configuration registers is saved to the memory using a first set of linear address space. For a second reduced power state, data of a second portion of the configuration registers is saved to the memory using a second set of linear address space and data of a third portion of the configuration registers is saved to the memory using a third set of linear address space.
    Type: Application
    Filed: September 23, 2021
    Publication date: March 23, 2023
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Benjamin Tsien, Alexander J. Branover, Christopher T. Weaver, Indrani Paul, Mihir Shaileshbhai Doctor, John P. Petry, Stephen V. Kosonocky, Thomas J. Gibney, Jose G. Cruz, Pravesh Gupta, Chintan S. Patel
  • PRECISE SHADOWING AND ADJUSTMENT OF ON-DIE TIMERS IN LOW POWER STATES
    Publication number: 20220413984
    Abstract: An integrated circuit (IC) includes a first circuit including a timer for receiving an adjustable clock signal. Responsive to leaving the non-operational power state to enter a power state in which the adjustable clock has a lower frequency than the reference clock, the first circuit adjusts the frequency of the adjustable clock to a frequency higher than the lower frequency, and then receives an elapsed time associated with the non-operational power state and starts the timer using an adjusted timer value.
    Type: Application
    Filed: June 24, 2021
    Publication date: December 29, 2022
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Benjamin Tsien, Pravesh Gupta
  • Enhanced Low-Priority Arbitration
    Publication number: 20220309013
    Abstract: A computing system may implement a low priority arbitration interrupt method that includes receiving a message signaled interrupt (MSI) message from an input output hub (I/O hub) transmitted over an interconnect fabric, selecting a processor to interrupt from a cluster of processors based on arbitration parameters, and communicating an interrupt service routine to the selected processor, wherein the I/O hub and the cluster of processors are located within a common domain.
    Type: Application
    Filed: March 26, 2021
    Publication date: September 29, 2022
    Inventors: Eric Christopher Morton, Pravesh Gupta, Bryan P Broussard, Li Ou
  • Distributed interrupt priority and resolution of race conditions
    Patent number: 11341069
    Abstract: A method of operating a processing unit includes storing a first copy of a first interrupt control value in a cache device of the processing unit, receiving from an interrupt controller a first interrupt message transmitted via an interconnect fabric, where the first interrupt message includes a second copy of the first interrupt control value, and if the first copy matches the second copy, servicing an interrupt specified in the first interrupt message.
    Type: Grant
    Filed: October 12, 2020
    Date of Patent: May 24, 2022
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bryan P Broussard, Paul Moyer, Eric Christopher Morton, Pravesh Gupta
  • DISTRIBUTED INTERRUPT PRIORITY AND RESOLUTION OF RACE CONDITIONS
    Publication number: 20220114123
    Abstract: A method of operating a processing unit includes storing a first copy of a first interrupt control value in a cache device of the processing unit, receiving from an interrupt controller a first interrupt message transmitted via an interconnect fabric, where the first interrupt message includes a second copy of the first interrupt control value, and if the first copy matches the second copy, servicing an interrupt specified in the first interrupt message.
    Type: Application
    Filed: October 12, 2020
    Publication date: April 14, 2022
    Inventors: Bryan P Broussard, Paul Moyer, Eric Christopher Morton, Pravesh Gupta