Patents by Inventor Pravin Chingudi

Pravin Chingudi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11475194
    Abstract: Techniques improve integrated circuit design by employing multi-operating condition frequency prediction for statically timed designs through statistical analysis. A design management component (DMC) can determine a trained model representing timing path properties and operating conditions of agnostic timing paths based on an analysis of vectorized data that represents timing path information associated with the agnostic timing paths. DMC can perform statistical regression on the vectorized data to facilitate training the trained model. A static timing analysis (STA) component can perform STA on design information associated with the integrated circuitry design and determine an operating condition of a timing path of the integrated circuitry design based on the STA. DMC can predict or determine at least one other operating condition associated with the integrated circuitry design based on the operating condition and the trained model.
    Type: Grant
    Filed: January 31, 2020
    Date of Patent: October 18, 2022
    Assignee: Apex Semiconductor
    Inventors: Alfred Yeung, Minkyu Kim, Suresh Subramaniam, Pravin Chingudi
  • Patent number: 11386252
    Abstract: Techniques improve integrated circuit design by employing multi-operating condition frequency prediction for statically timed designs through spice-based timing path labeling and statistical analysis. Design management component (DMC) can randomly determine and generate sample timing paths based on parameters of characteristics associated with the sample timing paths, the parameters determined based on random seed values; simulate responses of the sample timing paths; and generate vectorized data based on the simulated responses. DMC determines a trained model representing timing path properties and operating conditions of sample timing paths based on statistical analysis of vectorized data. Static timing analysis (STA) component can perform STA on design information of integrated circuitry design and determine an operating condition of a timing path of the design based on the STA.
    Type: Grant
    Filed: March 8, 2021
    Date of Patent: July 12, 2022
    Assignee: Apex Semiconductor
    Inventors: Pravin Chingudi, Suresh Subramaniam, Alfred Yeung, Minkyu Kim, Pingchun Chiang
  • Patent number: 11295057
    Abstract: A corner prediction system applies data generated through discrete process, voltage, and temperature (PVT) corner prediction to achieve highly accurate continuous corner prediction coverage. Embodiments of the corner prediction system can be trained to generate accurate performance metric prediction for a continuous range of PVT corners within a design space given a set of available pre-trained PVT corners. The corner prediction system can address the need to provide accurate continuous timing prediction coverage of design operating conditions (represented by PVT corners) through the availability of discrete PVT corners.
    Type: Grant
    Filed: February 10, 2021
    Date of Patent: April 5, 2022
    Assignee: Apex Semiconductor
    Inventors: Minkyu Kim, Alfred Yeung, Pingchun Chiang, Suresh Subramaniam, Pravin Chingudi
  • Patent number: 11036908
    Abstract: Techniques improve integrated circuit design by employing multi-operating condition frequency prediction for statically timed designs through spice-based timing path labeling and statistical analysis. Design management component (DMC) can randomly determine and generate sample timing paths based on parameters of characteristics associated with the sample timing paths, the parameters determined based on random seed values; simulate responses of the sample timing paths; and generate vectorized data based on the simulated responses. DMC determines a trained model representing timing path properties and operating conditions of sample timing paths based on statistical analysis of vectorized data. Static timing analysis (STA) component can perform STA on design information of integrated circuitry design and determine an operating condition of a timing path of the design based on the STA.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: June 15, 2021
    Assignee: Apex Semiconductor
    Inventors: Pravin Chingudi, Suresh Subramaniam, Alfred Yeung, Minkyu Kim, Pingchun Chiang