Abstract: An example multiphase power converter circuit includes a first power stage is configured to provide a first phase output signal at a first switching output based on a first control signal. The first power stage includes first open fault detection circuitry configured to disable detecting and/or reporting of an open fault condition responsive to the first control signal. A second power stage is configured to provide a second phase output signal at a second switching output based on a second control signal. The second power stage includes second open fault detection circuitry configured to enable detecting and/or reporting of the open fault condition responsive to the second control signal having a value to turn off the second power stage. The second open fault detection circuitry is further configured to detect the open fault condition based on a voltage at the second switching output.

Abstract: A circuit includes a current emulation circuit having an output and a current measurement circuit having an input and an output. The circuit also includes a first switch having a first terminal and a second terminal, the first terminal coupled to the output of the current measurement circuit and a second switch having a first terminal and a second terminal, the first terminal coupled to the output of the current emulation circuit and the second terminal coupled to the second terminal of the first switch. Additionally, the circuit includes a third switch having a first terminal and a second terminal, the first terminal coupled to the first terminal of the first switch and the second terminal coupled to the first terminal of the second switch.

Abstract: One example includes a VID signal decoder circuit. The circuit includes a coarse resolution decoder that receives a VID signal. The VID signal can be encoded with a digital value of an output voltage. The coarse resolution decoder can decode the VID signal to generate a first digital signal. The circuit also includes a fine resolution decoder that receives the VID signal and to decode the VID signal to generate a second digital signal. The circuit further includes a multiplexer to provide the first digital signal as an output signal responsive to a first state of a selection signal and to provide the second digital signal as the output signal responsive to a second state of the selection signal. The first and second states of the selection signal can be based on a relative amplitude of the first and second digital signals.

Abstract: A DC-DC converter includes a current sense circuit. The current sense circuit includes a sense current output, an inductor current measurement circuit, an inductor current emulation circuit, a first switch, and a second switch. The inductor current measurement circuit has an output. The inductor current emulation circuit has an output. The first switch is coupled between the output of the inductor current measurement circuit and the sense current output. The second switch is coupled between the output of the inductor current emulation circuit and the sense current output.

Abstract: In an example, a circuit includes an emulated current generator configured to provide an emulated current signal responsive to a charge current and a discharge current. The emulated current signal can be representative of an emulated current through an output inductor. A comparator is configured to provide a comparator signal responsive to the emulated current signal and sensed current signal representative of a measure of current through the output inductor. An inductor code counter is configured to adjust an inductor code count value responsive to the comparator signal. A slope of the emulated current signal can be adjusted responsive to the inductor code count value.

Abstract: Aspects of the disclosure provide for a circuit, in some examples, including a storage element, a co-processor, and a telemetry sequencer coupled to the storage element and the co-processor. The telemetry sequencer is configured to implement a digital state machine to receive configuration information indicating a type of telemetry data for generation, retrieve operations and operands, where the operations and the operands define a sequential series of actions for execution to generate the telemetry data, drive the co-processor with the operations and the operands by passing some of the operations and some of the operands to the co-processor for processing by the co-processor, receive, from the co-processor, and store an intermediate output of the series of actions as the telemetry data in a first format, and receive, from the co-processor, and store a final output of the series of actions as the telemetry data in a second format.

Abstract: An over/under voltage protection circuit includes a voltage input terminal, a digital-to analog converter, a comparator, and a control circuit. The comparator includes a first input coupled to an output of the digital-to-analog converter, and a second input coupled to the voltage input terminal. The control circuit includes an output coupled to an input of the digital-to-analog converter, and an input coupled to an output of the comparator. The control circuit is configured to set the digital-to-analog converter to generate an overvoltage fault threshold responsive to the output of the comparator indicating that voltage of a signal at the voltage input terminal exceeds a threshold currently generated by the digital-to-analog converter.

Abstract: A circuit for a multi-phase power regulator including a power stage with a first phase and a second phase, the circuit including phase management circuitry coupled to the first phase and the second phase to control the first phase and the second phase, a first comparator coupled to an output of the multi-phase power regulator to compare a value of the output of the multi-phase power regulator to a first threshold value to produce a first comparison result, and phase shedding circuitry coupled to the first comparator and the phase management circuitry to control the phase management circuitry to activate or deactivate the second phase based at least partially on the first comparison result.

Abstract: A current detection system includes an inductor and a detection circuit coupled across the inductor. The inductor is configured to receive an input signal that includes an input current and generate a voltage across the inductor. The current detection circuit includes a sensing network and a transconductance amplifier. The sensing network includes a capacitor and is configured to monitor a voltage across the inductor. The transconductance amplifier is configured to receive a differential voltage indicative of a voltage drop across the capacitor and output a differential output current proportional to the differential voltage.

Abstract: A one-time programmable (OTP) circuit. The OTP circuit includes a non-volatile OTP memory disposed on a first circuit die. The OTP memory includes a floating gate terminal. The OTP circuit also includes a cross-coupled latch disposed on the first circuit die and coupled to the OTP memory and volatile memory input circuitry disposed on the first circuit die and coupled to the cross-coupled latch. The volatile memory input circuitry is configured to receive a test value and write the test value into the cross-coupled latch. The OTP circuit is configured to receive a programming command and store the test value in the OTP memory in response to receipt of the programming command.

Abstract: A voltage generation circuit generating a reference voltage using a bandgap reference. A countering circuit is included to adaptively counter for any deviations caused in a bandgap reference voltage such that the reference voltage is independent of fabrication process variations and changes in ambient temperature. In an embodiment, current, proportionate to deviation in absolute value of Vbe from a nominal value, is injected into the emitter-base junction to cause Vbe to equal the nominal value.

Abstract: An analog to digital converter (ADC) containing an operational amplifier having a first pair of input terminals and a second pair of input terminals, wherein the output varies if the input signals on either of the input terminals pairs is changed in either the sampling phase or a hold phase. Such an operational amplifier is conveniently shared by two stages of a ADC, while reducing power consumption as well as errors.

Abstract: An amplifier sharing technique in an analog to digital converter (ADC) in which a cascaded combination of a pre-amplifier and main amplifier is used to provide the required amplification for a first stage, and only the main amplifier is used to provide the amplification for the second stage. Switches and capacitors are used in conjunction such that the sampling and feedback capacitors of the first stage are connected across the cascaded combination in a first phase, and sampling and feedback capacitors of the second stage are connected across the main amplifier in a second phase. By appropriate choice of parameter values for various components, the second poles due to the pre-amplifier may be located at the higher frequency ranges obtaining the required unity gain bandwidth (UGB) without Miller compensation and/or additional gain.

Abstract: A trans-impedance filter circuit provided according to an aspect of the present invention contains an operational amplifier, a first resistor, a first capacitor, a second resistor, and a second capacitor. The second capacitor is connected in parallel between the inverting input terminal and an output path of the operational amplifier. The second resistor is connected between the output terminal of the operational amplifier and a second node on a path connecting the input signal to the inverting input terminal. The first resistor is coupled between the first node and inverting input terminal of the operational amplifier. The first capacitor is coupled between the first node and Vss. Due to such connections, the filter circuit operates as a second order filter circuit, thereby providing a desired high level of filtering. Also, as the filter circuit is implemented with a single operational amplifier, the power and area requirements are reduced.